MAX1710 查看數據表（PDF） - Maxim Integrated

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MAX1710

High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs

Maxim Integrated 

High-Speed, Digitally Adjusted

Step-Down Controllers for Notebook CPUs

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, VBATT = 15V, VCC = VDD = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted.)

PARAMETER

CONDITIONS

MIN TYP

TON VCC Level

TON logic input high level

VCC - 0.4

TON Float Voltage

TON logic input upper-midrange level

3.15

TON Reference Level

TON logic input lower-midrange level

1.65

TON GND Level

TON logic input low level

TON Logic Input Current

TON only, forced to GND or VCC

-3

MAX

3.85

2.35

0.5

3

UNIT

V

V

V

V

µA

ELECTRICAL CHARACTERISTICS

(Circuit of Figure 1, VBATT = 15V, VCC = VDD = 5V, SKIP = GND, TA = -40°C to +85°C, unless otherwise noted.) (Note 3)

PARAMETER

Input Voltage Range

DC Output Voltage Accuracy

CONDITIONS

MIN

Battery voltage, V+

2

VCC, VDD

4.5

VBATT = 4.5V to 28V, for all DAC codes from 1.32V to 2V -1.5

D/A codes, includes load

regulation error

DAC codes from 0.925V to

1.275V

-1.7

TYP MAX

28

5.5

1.5

1.7

On-Time

TON = GND (550kHz)

VBATT = 24V, TON = REF (400kHz)

FB = 2V

(Note 2)

TON = open (300kHz)

TON = VCC (200kHz)

140

180

175

225

260

320

380

470

Minimum Off-Time

(Note 2)

500

Quiescent Supply Current (VCC) Measured at VCC, FB forced above the regulation point

950

Reference Voltage

VCC = 4.5V to 5.5V, no external REF load

1.98

2.02

With respect to unloaded output voltage (MAX1710)

10

15

Overvoltage Trip Threshold

(MAX1711/MAX1712)

2.20

2.30

Output Undervoltage

With respect to unloaded output voltage (MAX1710)

65

75

Protection Threshold

(MAX1711/MAX1712)

0.75

0.85

Current-Limit Threshold

(Positive Direction, Fixed)

LX to PGND, ILIM tied to VCC

85

115

Current-Limit Threshold

(Positive Direction, Adjustable)

LX to PGND

RLIM = 100kΩ

RLIM = 400kΩ

35

65

160

240

VCC Undervoltage Lockout

Threshold

Rising edge, hysteresis = 20mV, PWM disabled below

this level

4.1

4.4

Logic Input High Voltage

Logic Input Low Voltage

Logic Input Current

Logic Input Pullup Current

D0–D4, SHDN, SKIP, OVP

D0–D4, SHDN, SKIP, OVP

SHDN, SKIP, OVP

D0–D4, each forced to GND

2.4

0.8

-1

1

3

10

UNIT

V

%

%

ns

ns

µA

V

%

V

%

V

mV

mV

V

V

V

µA

µA

4 _______________________________________________________________________________________

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