MAX17000(2011) 查看數據表（PDF） - Maxim Integrated

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MAX17000
(Rev.:2011)

Complete DDR2 and DDR3 Memory Power-Management Solution

Maxim Integrated 

Complete DDR2 and DDR3 Memory

Power-Management Solution

ELECTRICAL CHARACTERISTICS (continued)

(VIN = 12V, VCC = VDD = VSHDN = VREFIN = 5V, VCSL = 1.8V, STDBY = SKIP = AGND, TA = 0°C to +85°C, unless otherwise noted.

Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

CURRENT LIMIT

Valley Current-Limit Threshold

VLIMIT VCSH - VCSL

17

20

25

mV

Current-Limit Threshold

(Negative)

VNEG VCSH - VCSL, SKIP = VCC

-23

mV

Current-Limit Threshold

(Zero Crossing)

VZX

VCSH - VCSL

1

mV

SMPS GATE DRIVERS

DH Gate Driver On-Resistance

DL Gate Driver On-Resistance

RDH BST - LX forced to 5V

DL high

RDL

DL low

1.5

5.0

1.5

5.0

0.6

3.0

DH Gate Driver Source/

Sink Current

DL Gate Driver Source/

Sink Current

Dead Time

Internal BST Switch

On-Resistance

LX, BST Leakage Current

INPUTS AND OUTPUTS

Logic Input Threshold

Logic Input Current

Input Leakage Current

Input Bias Current

IDH

DH forced to 2.5V, BST - LX forced to 5V

IDL(SRC)

IDL(SNK)

tDEAD

RBST

DL forced to 2.5V

DL forced to 2.5V

DL rising, TA = +25°C

DL falling, TA = +25°C

IBST = 10mA,

VDD = 5V internal design target

VBST = VLX = 26V, SHDN = AGND,

TA = +25°C

SHDN, STDBY, SKIP, OVP, rising edge

hysteresis = 300mV/600mV (min/max)

SKIP = AGND or VCC,

VCSH = 0V or VCC, TA = +25°C

VCSL = 0V or VCC

1

A

1

A

3

10

25

ns

15

35

4.5

0.001 20

µA

1.30 1.65 2.00

V

-1

+1

µA

-1

+1

µA

55

100

µA

_______________________________________________________________________________________ 5

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