MAX17000 查看數據表（PDF） - Maxim Integrated
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MAX17000 Datasheet PDF : 32 Pages
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MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
Table 3. Operating Mode Truth Table
SHDN STDBY SKIP
OPERATION
1 LH LH
SMPS output ramps up in skip mode with a 1.4ms (typ) ramp time. PGOOD1 is held low until the
X
SMPS output is in regulation.
VTT and VTTR ramp up to the final voltage based on VCSL/2 or VREFIN. PGOOD2 is held low until
VTT is in regulation.
2 LH
L
SMPS output ramps up in skip mode with a 1.4ms ramp time. PGOOD1 is held low until the SMPS
output is in regulation.
X
Once CSL or FB is in regulation, the PWM block turns off and enters standby mode.
VTT remains off throughout since STDBY is low. PGOOD2 stays low throughout. The VTT
discharge FET is enabled if OVP is high, but disabled if OVP is low.
VTTR ramps up to the final voltage based on VCSL/2 or VREFIN.
Ultra-skip and standby modes are exited and the full current capability of the MAX17000 is
available.
3
H L H X VTT ramps up after the internal SMPS block is ready. VTT ramps to the final voltage based on
VCSL/2 or VREFIN.
PGOOD2 goes high when VTT is in regulation.
4
H
SMPS output is in forced-PWM mode.
H
H
VTT and VTTR are enabled.
PGOOD1 is high when the SMPS output is in regulation.
PGOOD2 is high when VTT is in regulation.
5
H
SMPS output is in normal skip mode.
H
L
VTT and VTTR are enabled.
PGOOD1 is high when the SMPS output is in regulation.
PGOOD2 is high when VTT is in regulation.
6
H
SMPS output is in ultra-skip mode.
L
X
VTT is off and is high impedance.
PGOOD2 is forced low.
VTTR is active and regulates to VCSL/2 or VREFIN.
7 HL H
8 HL
L
Ultra-skip or skip mode is exited as the MAX17000 ramps the output down to zero.
X VTTR tracks VCSL/2 or VREFIN during shutdown. After the SMPS output reaches 25mV, DL goes low.
Ultra-skip or skip mode is exited as the MAX17000 ramps the output down to zero.
X VTTR tracks VCSL/2 or VREFIN during shutdown. After the SMPS output reaches 25mV, DL goes
low. VTT is not enabled throughout soft-shutdown.
9
L
X
X
DL low. Internal16 discharge MOSFETs on CSL and VTT enabled if OVP is high, but disabled if
OVP is low.
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