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MAX17000 查看數據表(PDF) - Maxim Integrated

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MAX17000 Datasheet PDF : 32 Pages
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MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
The MAX17000 always uses skip mode during startup,
regardless of the SKIP and STDBY setting. The SKIP
and STDBY controls take effect after soft-start is done.
See Figure 3.
Forced-PWM Mode (SKIP = VCC)
The low-noise forced-PWM mode (SKIP = VCC) disables
the zero-crossing comparator, which controls the low-
side switch on-time. This forces the low-side gate-drive
waveform to constantly be the complement of the high-
side gate-drive waveform, so the inductor current
reverses at light loads while DH maintains a duty factor
of VOUT/VIN. The benefit of forced-PWM mode is to keep
a fairly constant switching frequency. However, forced-
PWM operation comes at a cost: the no-load 5V bias
ΔI
=
VIN - VOUT
Δt
L
IPEAK
ILOAD = IPEAK/2
0
ON-TIME
TIME
Figure 3. Pulse-Skipping/Discontinuous Crossover Point
current remains between 2mA to 20mA, depending on
the switching frequency.
STDBY = AGND overrides the SKIP pin setting, forcing
the MAX17000 into standby.
The MAX17000 switches to forced-PWM mode during
shutdown, regardless of the state of SKIP and STDBY
levels.
Standby Mode (STDBY)
It should be noted that standby mode in the MAX17000
corresponds to computer system standby operation,
and is not referring to the MAX17000 shutdown status.
When standby mode is enabled (STDBY = AGND), the
MAX17000 switches over from the fast internal PWM
block to a low-quiescent current mode using a low-
power valley comparator to initiate an on-time pulse.
The zero-crossing comparator is enabled so that the
MAX17000 only operates in discontinuous mode,
reducing the maximum available output current by 1/6.
The system is NOT expected to have any fast load tran-
sients in such a state. While in standby, VTT is disabled
(high impedance) but VTTR remains active. SKIP is
ignored when standby mode is enabled.
When standby mode is disabled (STDBY = VCC), the
MAX17000 reenables its fast internal PWM block. Once
the internal SMPS block is ready, the VTT block is
enabled and the VTT output capacitor is charged. The
VTT soft-start current limit increases linearly from zero
to its maximum current limit in 160μs (typ), keeping the
input VTTI inrush low. See Figure 4.
STDBY
SMPS_RUNOK
SMPS OUTPUT
VTTR OUTPUT
VTT OUTPUT
VTT CURRENT LIMIT
PGOOD1
PGOOD2
< 50μs
VTT HIGH IMPEDANCE
160μs
Figure 4. MAX17000 Standby Mode Timing
Maxim Integrated
19

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