MAX3420E(2005) 查看數據表（PDF） - Maxim Integrated

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MAX3420E
(Rev.:2005)

USB Peripheral Controller with SPI Interface

Maxim Integrated 

USB Peripheral Controller

with SPI Interface

TIMING CHARACTERISTICS

(VCC = +3V to +3.6V, VL = +1.71V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +3.3V, VL =

+2.5V, TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

USB TRANSMITTER TIMING CHARACTERISTICS

D+, D- Rise Time

tRISE CL = 50pF, Figures 6 and 7

4

D+, D- Fall Time

tFALL CL = 50pF, Figures 6 and 7

4

Rise-/Fall-Time Matching

CL = 50pF, Figures 6 and 7 (Note 2)

90

Output-Signal Crossover Voltage

CL = 50pF, Figures 6 and 7 (Note 2)

1.3

SPI BUS TIMING CHARACTERISTICS (VL = 2.5V, C SS = 33pF*) (Figures 8 and 9) (Note 3)

Serial Clock (SCLK) Period (Note 4)

tCP

VL = 1.71V

VL = 2.5V

77.0

38.4

SCLK Pulse-Width High

tCH

17

SCLK Pulse-Width Low

tCL

17

SS Fall-to-MISO Valid

tCSS

20

SS Leading Time Before the First

SCLK Edge

tL

30

20

ns

20

ns

110

%

2.0

V

ns

ns

ns

ns

ns

SS Trailing Time After the Last

SCLK Edge

tT

30

ns

Data-In Setup Time

Data-In Hold Time

SS Pulse High

tDS

tDH

tCSW

5

ns

10

ns

200

ns

SCLK Fall-to-MISO Propagation

Delay

tDO

14.2

ns

SCLK Fall-to-MOSI Propagation

Delay

tDI

SCLK Rise-to-MOSI Drive

tON

SS High-to-MOSI High

Impedance

tOFF

14.2

ns

3.5

ns

20

ns

SUSPEND TIMING CHARACTERISTICS

Time-to-Enter Suspend

Time-to-Exit Suspend

PWRDOWN = 1 to oscillator stop

PWRDOWN = 1 to 0 to OSCOKIRQ (Note 5)

5

µs

3

ms

Note 1: Parameters are 100% production tested at TA = +25°C, and guaranteed by correlation over temperature.

Note 2: Design guaranteed by bench testing. Limits are not production tested.

Note 3: At VL = 1.71V to 2.5V, derate all of the SPI timing characteristics by 50%. Not production tested.

Note 4: The minimum period is derived from SPI timing parameters.

Note 5: Time-to-exit suspend is dependent on the crystal used.

Note 6: Redesign in progress to meet USB specification.

*33pF capacitor will not be required after redesign.

10 ______________________________________________________________________________________

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