MAX3622 查看數據表（PDF） - Maxim Integrated

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MAX3622

Low-Jitter, Precision Clock Generator with Two Outputs

Maxim Integrated 

Low-Jitter, Precision Clock Generator

with Two Outputs

Layout Considerations

The inputs and outputs are critical paths for the

MAX3622, and care should be taken to minimize dis-

continuities on these transmission lines. Here are some

suggestions for maximizing the MAX3622’s perfor-

mance:

• An uninterrupted ground plane should be posi-

tioned beneath the clock I/Os.

• Supply and ground pin vias should be placed

close to the IC and the input/output interfaces to

allow a return current path to the MAX3622 and the

receive devices.

• Supply decoupling capacitors should be placed

close to the MAX3622 supply pins.

• Maintain 100Ω differential (or 50Ω single-ended)

transmission line impedance out of the MAX3622.

• Use good high-frequency layout techniques and a

multilayer board with an uninterrupted ground

plane to minimize EMI and crosstalk.

Refer to the MAX3622 Evaluation Kit for more information.

Typical Application Circuit

10.5Ω

10μF

0.01μF

VCC

0.1μF

0.1μF

VCC

0.01μF

0.1μF

+3.3V ±5%

VCC

VCCA

VCCO_B

QAC_OE

QB_OE

MAX3622

X_OUT

X_IN

GND

25MHz

(CL = 18pF)

33pF

27pF

VDDO_A

36Ω

QA_C

125MHz

QB

Z0 = 50Ω

QB

Z0 = 50Ω

156.25MHz

GNDO_A

Z0 = 50Ω

ASIC

ASIC

50Ω 50Ω

(VCC - 2V)

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