MAX4684ETB 查看數據表（PDF） - Maxim Integrated
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MAX4684ETB Datasheet PDF : 10 Pages
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0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
MAX4684
MAX4685
VGEN
RGEN NC_
OR NO_
GND
V+
V+
COM_
IN_
VIL TO VIH
Figure 4. Charge Injection
Test Circuits/Timing Diagrams (continued)
VOUT
CL
VOUT
IN
OFF
ΔVOUT
OFF
ON
ON
OFF
OFF
IN
Q = (ΔVOUT)(CL)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
+5V 10nF
0V OR V+ IN_
V+
VIN
COM
NC_
MAX4684
MAX4685
VOUT
50Ω
NO
GND
NETWORK
ANALYZER
50Ω
50Ω
MEAS
50Ω
REF
50Ω
OFF-ISOLATION = 20log
VOUT
VIN
ON-LOSS
=
20log
VOUT
VIN
CROSSTALK = 20log
VOUT
VIN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
CAPACITANCE
METER
f = 1MHz
10nF V+
V+
COM_
MAX4684
MAX4685
NC_ or
NO_
IN
VIL
OR
VIH
GND
Figure 6. Channel Off/On-Capacitance
Pin Configurations (continued)
TOP VIEW
MAX4684/MAX4685
V+ 1
NO1 2
COM1 3
IN1 4
NC1 5
10 NO2
9 COM2
8 IN2
7 NC2
*EP 6 GND
3mm ✕ 3mm TDFN
*CONNECT EP TO GND.
8 _______________________________________________________________________________________
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