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MAX797H 查看數據表(PDF) - Maxim Integrated

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MAX797H Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
High-Voltage, Step-Down Controller with
Synchronous Rectifier for CPU Power
______________________________________________________________Pin Description
PIN NAME
FUNCTION
1
SS
Soft-Start Timing Capacitor Connection. Ramp time to full current limit is approximately 1ms/nF.
Disables pulse-skipping mode when high. Connect SKIP to GND for normal use. Do not leave unconnected.
2
SKIP
With SKIP grounded, the device automatically changes from pulse-skipping operation to full PWM operation
when the load current exceeds approximately 30% of maximum.
3
REF
Reference Voltage Output. Bypass REF to GND with 0.33µF minimum.
4
GND
Low-noise Analog Ground and Feedback Reference Point
Oscillator Synchronization and Frequency Select. Tie SYNC to GND or VL for 150kHz operation; tie to REF for
5
SYNC
300kHz operation. A high-to-low transition begins a new cycle. Drive SYNC with 0V to 5V logic levels (see
Electrical Characteristics for VIH and VIL specifications). SYNC capture range is guaranteed to be 190kHz to
340kHz.
6
SHDN
Shutdown Control Input, Active Low. Logic threshold is set at approximately 1V (VTH of an internal N-channel
MOSFET). Tie SHDN to V+ for automatic start-up.
Feedback Input. Regulates at FB = REF (approximately 2.505V) in adjustable mode. FB is a Dual ModeTM
input that also selects the fixed-output voltage settings as follows:
Connect to GND for 3.3V operation.
7
FB
Connect to VL for 5V operation.
Connect to a resistor divider for adjustable mode. FB can be driven with 5V Rail-to-Rail® logic to change
the output voltage under system control.
8
CSH
Current-Sense Input, High Side. Current-limit level is 100mV referred to CSL.
9
CSL
Current-Sense Input, Low Side. CSL also serves as the feedback input in fixed-output modes.
10
V+
Battery Voltage Input (4.5V to 30V). Bypass V+ to PGND close to the IC with a 0.1µF capacitor. Connects to a
linear regulator that powers VL.
5V Internal Linear-Regulator Output. VL is also the supply-voltage rail for the chip. It is switched to the output
11
VL
voltage via CSL (VCSL > 4.5V) for automatic bootstrapping. Bypass to GND with 4.7µF. VL can supply up to
5mA for external loads.
12 PGND Power Ground
13
DL
Low-Side Gate-Drive Output. DL normally drives the synchronous-rectifier MOSFET. Swings 0V to VL.
14
BST
Boost Capacitor Connection for High-Side Gate Drive (0.1µF)
15
LX
Switching Node (inductor) Connection. LX can swing 2V below ground without hazard.
16
DH
High-Side Gate-Drive Output. DH normally drives the main buck switch. It is a floating driver output that
swings from LX to BST, riding on the LX switching-node voltage.
Dual Mode is a trademark of Maxim Integrated Products.
Rail-to-Rail is a registered trademark of Nippon Motorola Ltd.
_______________________________________________________________________________________ 5

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