MB39A119 查看數據表（PDF） - Fujitsu

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MB39A119

DC/DC Converter IC of Synchronous Rectification for charging Li-ion battery

Fujitsu 

MB39A119

■ PIN DESCRIPTION

Pin No.

1

2

3

4

Pin Name

VCC

−INC1

+ INC1

ACIN

5

ACOK

6

CVM

7

+ INE1

8

−INE1

9

OUTC2

10

+ INC2

11

−INC2

12

+ INE2

13

− INE2

14

FB123

15

−INE3

16

OUTD

17

CS

18

RT

19

VREF

20

GND

21

CTL

22

XACOK

23

PGND

24

OUT-2

25

VB

26

VS

27

OUT-1

28

CB

I/O

Description

⎯ Power supply terminal for reference voltage and control circuit.

I Input current detection amplifier (Current Amp1) input terminal.

I Input current detection amplifier (Current Amp1) input terminal.

I AC adapter voltage detection block (AC Comp.) input terminal.

AC adapter voltage detection block (AC Comp.) output terminal.

O ACOK = L when ACIN = H, ACOK = Hi-Z when ACIN = L,

ACOK = Hi-Z when CTL = L

O Constant voltage control state detection block (CV Comp.) output terminal.

I Error amplifier (Error Amp1) non-inverted input terminal.

I Error amplifier (Error Amp1) inverted input terminal.

O Charge current detection amplifier (Current Amp2) output terminal.

I Charge current detection amplifier (Current Amp2) input terminal.

I

Charge current detection amplifier (Current Amp2) and low input voltage

detection comparator (UV Comp.) input terminal.

I Error amplifier (Error Amp2) non-inverted input terminal.

I Error amplifier (Error Amp2) inverted input terminal.

O Error amplifier (Error Amp1, 2, 3) output terminal.

I Error amplifier (Error Amp3) inverted input terminal.

This terminal is set to Hi-Z to prevent loss of current through the output

O

voltage setting resistor when IC is standby mode.

OUTD = Hi-Z when CTL = L

OUTD = L when CTL = H

⎯ Soft-start capacitor connection terminal.

⎯ Triangular wave oscillation frequency setting resistor connection terminal.

O Reference voltage output terminal.

⎯ Ground terminal.

I Power supply control terminal for DC/DC converter block.

AC adapter voltage detection block (AC Comp.) output terminal.

O XACOK = Hi-Z when ACIN = H, XACOK = L when ACIN = L,

XACOK = Hi-Z when CTL = L

⎯ Ground terminal.

O External synchronous rectification side FET gate drive output terminal.

O Bias output terminal for output circuit.

⎯ External main side FET source conneciton terminal.

O External main side FET gate drive output terminal.

⎯

Boot strap capacitor connection terminal.

The capacitor is connected between the CB terminal and the VS terminal.

DS04-27247-3E

3

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