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MB91F318R 查看數據表(PDF) - Fujitsu

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MB91F318R Datasheet PDF : 71 Pages
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MB91319R Series
I2C Interface *
• 4 channels (built-in bridge function)
• Master/slave sending and receiving
• Clock synchronization function
• Detecting transmitting direction function
• Bus error detection function
• Standard mode (Max 100 kbps) /High speed mode (Max 400 kbps) supported
• Built-in FIFO function with 16-byte data each for transmit/receive
• Arbitration function
• Slave address and general call address detection function
• Start condition repeated generation and detection
• 10-bit/7-bit slave address
Interrupt controller
• Total of external interrupt pin is 5. (one non-maskable interrupt pin (NMI) and four normal interrupt pins (INT3
to INT0) )
• Interrupt from internal peripheral
• Programmable priorities (16 levels) for all interrupts except the non-maskable interrupt
• At the STOP, available use for Wake Up
A/D converter
• 10-bit resolution, 10 channels
• Successive approximation type converter. Conversion time: Approx. 10 µs
• Conversion modes (one-shot conversion mode, scanning conversion mode)
• Activation trigger (software / external trigger)
PPG
• 4 channels are incorporated.
• 16-bit down counter, 16-bit data register with buffer for setting cycles
• The internal clock is selectable from 1/4/16/64 divisions.
PWC
• 1 channel (1 input) is incorporated.
• 16-bit up counter
• Easy digital low pass filter
Multi function timer
• 4 channels are incorporated.
• Low pass filter eliminating noise below the clock setting
• Capable of pulse width measurement according to fine settings using seven types of clock signals
• Event count function from pin input
• Interval timer function using seven kinds of clock and external input clock
USB function
• Full speed double buffer of USB2.0 version
• CONTROL IN/OUT, BULK IN/OUT, INTERRUPT IN
(Continued)
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