MBRB3030CTL 查看數據表（PDF） - ON Semiconductor
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MBRB3030CTL Datasheet PDF : 8 Pages
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MBRB3030CTL
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Table 1. UIS Test Data
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PART
NO.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 3
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 4
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 5
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 6
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 7
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 8
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 9
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 10
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 11
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 12
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 13
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 14
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 15
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 16
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 17
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 18
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 19
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 20
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 21
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 22
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 23
24
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 25
IP (A)
46.6
41.7
46.0
42.7
44.9
44.1
26.5
26.4
24.4
27.6
27.7
17.9
18.9
18.8
19.0
74.2
77.3
75.2
77.3
73.8
75.6
74.7
78.4
70.5
78.3
BVR (V)
65.2
63.4
66.0
64.8
64.8
64.1
63.1
62.8
62.2
62.9
63.2
62.6
62.1
60.7
62.6
69.1
69.6
68.9
69.6
69.1
69.2
68.6
70.3
66.6
69.4
ENERGY
(mJ)
998.3
870.2
1038.9
904.2
997.3
865.0
1022.6
1024.9
872.0
1091.0
1102.4
1428.6
1547.4
1521.1
1566.2
768.4
815.4
791.7
842.6
752.4
823.2
747.5
834.0
678.4
817.3
L (mH)
1
1
1
1
1
1
3
3
3
3
3
10
10
10
10
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
TIME
(ms)
715
657
697
659
693
687
1261
1262
1178
1316
1314
2851
3038
3092
3037
322
333
328
333
321
328
327
335
317
339
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ The procedure to determine if a rectifier is appropriate,
As an example, the values were chosen as L = 200 mH,
OV = 12 V and BVR = 35 V.
Figure 13 illustrates the example. Note the UIS
characterization curve, the parasitic inductor current curve
and the safe operating region as indicated.
120
100
Ipeak Ċ TIME RELATIONSHIP
DUE TO CIRCUIT PARASITICS
80
60
40
UIS CHARACTERIZATION CURVE
20
SAFE OPERATING AREA
0
0 0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035 0.004
TIME (s)
Figure 13. DUT Peak Reverse and Circuit
Parasitic Inductance Current versus Time
SUMMARY
Traditionally, power rectifier users have been supplied
with single−data−point reverse−energy characteristics by
the supplier’s device data sheet; however, as has been shown
here and in previous work, the reverse withstand energy can
vary significantly depending on the application. What was
done in this work was to create a characterization scheme by
which the designer can overlay or map their particular
requirements onto the part capability and determine quite
accurately if the chosen device is applicable. This
characterization technique is very robust due to its statistical
from a reverse energy standpoint, to be used in the
approach, and with proper guardbanding (6s) can be used to
application circuit is as follows:
give worst−case device performance for the entire product
a. Obtain “Peak Reverse Current versus Time” curve
line. A “typical” characteristic curve is probably the most
from data book.
applicable for designers allowing them to design in their
b. Determine steady state operating voltage (OV) of
own margins.
circuit.
c. Determine parasitic inductance (L) of circuit section of
References
interest.
d. Obtain rated breakdown voltage (BVR) of rectifier
from data book.
e. From the following relationships,
1. Borras, R., Aliosi, P., Shumate, D., 1993, “Avalanche
Capability of Today’s Power Semiconductors,
“Proceedings, European Power Electronic
Conference,” 1993, Brighton, England
V
+
L
@
d
dt
i(t)
I
+
(BVR
*
L
OV)
@
t
a “designer” l versus t curve is plotted alongside the
2. Pshaenich, A., 1985, “Characterizing Overvoltage
Transient Suppressors,” Powerconversion
International, June/July
device characteristic plot.
f. The point where the two curves intersect is the current
level where the devices will start to fail. A peak
inductor current below this intersection should be
chosen for safe operating.
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