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MC-4532CD647 查看數據表(PDF) - NEC => Renesas Technology

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MC-4532CD647 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
MC-4532CD647
(2/2)
Byte No.
Function Described
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Notes
32 Command and address signal input
setup time
15H 0
0
0
1
0
1
0
1 1.5 ns
33 Command and address signal input
08H 0
0
0
0
1
0
0
0 0.8 ns
hold time
34 Data signal input setup time
15H 0
0
0
1
0
1
0
1 1.5 ns
35 Data signal input hold time
08H 0
0
0
0
1
0
0
0 0.8 ns
36-61
00H 0
0
0
0
0
0
0
0
5
62 SPD revision
5
63 Checksum for bytes 0 - 62
12H 0
0
0
1
0
0
1
0 1.2
B0H 1
0
1
1
0
0
0
0
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency
64H 0
1
1
0
0
1
0
0
127 Intel specification /CAS latency support FDH 1
1
1
1
1
1
0
1
Timing Chart
Refer to the SYNCHORONOUS DRAM MODULE TIMING CHART Information (M13348E).
Data Sheet M14276EJ2V0DS00
11

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