MC-4564EC727EF-A75 查看數據表（PDF） - NEC => Renesas Technology

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MC-4564EC727EF-A75

64M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE

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DATA SHEET

MOS INTEGRATED CIRCUIT

MC-4564EC727

64M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE

REGISTERED TYPE

Description

The MC-4564EC727 is a 67,108,864 words by 72 bits synchronous dynamic RAM module on which 36 pieces of

128 M SDRAM: µPD45128441 are assembled.

This module provides high density and large quantities of memory in a small space without utilizing the surface-

mounting technology on the printed circuit board.

Decoupling capacitors are mounted on power supply line for noise reduction.

Features

• 67,108,864 words by 72 bits organization (ECC type)

• Clock frequency and access time from CLK

Part number

/CAS latency

Clock frequency

(MAX.)

Access time from CLK

(MAX.)

Module type

MC-4564EC727EF-A75

5

5

MC-4564EC727PF-A75

CL = 3

CL = 2

CL = 3

CL = 2

133 MHz

100 MHz

133 MHz

100 MHz

5.4 ns

6.0 ns

5.4 ns

6.0 ns

PC133 Registered DIMM

Rev. 1.0 Compliant

• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge

• Pulsed interface

• Possible to assert random column address in every cycle

• Quad internal banks controlled by BA0 and BA1 (Bank Select)

• Programmable burst-length (1, 2, 4, 8 and Full Page)

• Programmable wrap sequence (Sequential / Interleave)

5 • Programmable /CAS latency (2, 3)

• Automatic precharge and controlled precharge

• CBR (Auto) refresh and self refresh

• All DQs have 10 Ω ± 10 % of series resistor

• Single 3.3 V ±0.3 V power supply

• LVTTL compatible

• 4,096 refresh cycles/64 ms

• Burst termination by Burst Stop command and Precharge command

• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)

• Registered type

• Serial PD

• Stacked monolithic technology

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. M14461EJ2V0DS00 (2nd edition) The mark 5 shows major revised points.

©

Date Published February 2000 NS CP(K)

Printed in Japan

1999

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