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MC100E142

5VECL 9-Bit Shift Register

ON Semiconductor 

MC10E142, MC100E142

5V ECL 9-Bit Shift Register

Description

The MC10E/100E142 is a 9-bit shift register, designed with

byte-parity applications in mind. The E142 performs serial/parallel in

and serial/parallel out, shifting in one direction. The nine inputs

D0 − D8 accept parallel input data, while S-IN accepts serial input

data. The Qn outputs do not need to be terminated for the shift

operation to function. To minimize noise and power, any Q output not

used should be left unterminated.

The SEL (Select) input pin is used to switch between the two modes

of operation − SHIFT and LOAD. The shift direction is from bit 0 to

bit 8. Input data is accepted by the registers a set-up time before the

positive going edge of CLK1 or CLK2; shifting is also accomplished

on the positive clock edge. A HIGH on the Master Reset pin (MR)

asynchronously resets all the registers to zero.

The 100 Series contains temperature compensation.

Features

• 700 MHz Min. Shift Frequency

• 9-Bit for Byte-Parity Applications

• Asynchronous Master Reset

• Dual Clocks

• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V

with VEE = 0 V

• NECL Mode Operating Range: VCC = 0 V

with VEE = −4.2 V to −5.7 V

• Internal Input 50 kW Pulldown Resistors

• ESD Protection: Human Body Model; > 2 kV,

Machine Model; > 200 V

• Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level:

Pb = 1

Pb−Free = 3

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

• Transistor Count = 405 devices

• Pb−Free Packages are Available*

http://onsemi.com

PLCC−28

FN SUFFIX

CASE 776

MARKING DIAGRAM*

1

MCxxxE142G

AWLYYWW

xxx

= 10 or 100

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW = Work Week

G

= Pb−Free Package

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2006

1

February, 2006 − Rev. 7

Publication Order Number:

MC10E142/D

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