MC100E143(2016) 查看數據表（PDF） - ON Semiconductor
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MC100E143 Datasheet PDF : 7 Pages
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MC10E143, MC100E143
Table 8. AC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 1))
0°C
25°C
85°C
Symbol
fSHIFT
tPLHt
PHL
ts
th
tRR
tPW
tSKEW
tJITTER
Tr
tf
Characteristic
Max. Shift Frequency
Propagation Delay To Output
Clk
MR
Setup Time
D
SEL
Hold Time
D
SEL
Reset Recovery Time
Minimum Pulse Width
Clk, MR
Within-Device Skew (Note 2)
Random Clock Jitter (RMS)
Rise/Fall Times
(20 - 80%)
Min Typ Max Min Typ Max Min Typ Max Unit
700 900
700 900
700 900
MHz
ps
600 800 1000 600 800 1000 600 800 1000
600 800 1000 600 800 1000 600 800 1000
ps
50 −100
50 −100
50 −100
300 150
300 150
300 150
ps
300 100
300 100
300 100
75 −150
75 −150
75 −150
900 700
900 700
900 700
ps
400
400
400
ps
75
75
75
ps
<1
<1
<1
ps
300 525 800 300 525 800 300 525 800 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: VEE can vary −0.46 V / +0.06 V.
100 Series: VEE can vary −0.46 V / +0.8 V.
2. Within-device skew is defined as identical transitions on similar paths through a device.
Q
Driver
Device
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
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