MC100LVE310 查看數據表（PDF） - ON Semiconductor

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MC100LVE310

3.3V ECL 2:8 Differential Fanout Buffer

ON Semiconductor 

MC100LVE310

Q0 Q0 Q1 VCCO Q1 Q2 Q2

Q0

25 24 23 22 21 20 19

Q0

VEE 26

18 Q3

Q1

Q1

CLK_SEL 27

17 Q3

Q2

CLKa 28

16 Q4

Q2

CLKa

VCC 1

Pinout: 28−Lead PLCC

(Top View)

15 VCCO

CLKa

Q3

Q3

CLKa 2

14 Q4

CLKb

Q4

VBB 3

13 Q5

CLKb

Q4

CLK_SEL

Q5

CLKb 4

12 Q5

Q5

5 6 7 8 9 10 11

Q6

CLKb NC Q7 VCCO Q7 Q6 Q6

Q6

Warning: All VCC, VCCO, and VEE pins must be externally

Q7

connected to Power Supply to guarantee proper operation.

Q7

Figure 1. Logic Diagram and Pinout Assignment

VBB

Table 1. PIN DESCRIPTION

Figure 2. Logic Symbol

PIN

FUNCTION

CLKa, CLKa; ,CLKb CLKb

Q0:7, Q0:7

CLK_SEL

VBB

VCC, VCCO

VEE

NC

ECL Differential Input Clocks

ECL Differential Outputs

ECL Input Clock Select

Reference Voltage Output

Positive Supply

Negative Supply

No Connect

Table 2. TRUTH TABLE

CLK_SEL

Input Clock

L

CLKa Selected

H

CLKb Selected

Table 3. ATTRIBUTES

Characteristics

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

Human Body Model

Machine Model

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

PLCC−28

Flammability Rating

Oxygen Index: 28 to 34

Transistor Count

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

Value

YES

N/A

> 2 kV

> 200 V

Pb Pkg

Pb−Free Pkg

Level 1

Level 3

UL 94 V−0 @ 0.125 in

212 Devices

http://onsemi.com

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