MC100LVEL90DW 查看數據表（PDF） - ON Semiconductor
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MC100LVEL90DW Datasheet PDF : 6 Pages
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MC100LVEL90
VCC Q0 Q0 GND Q1 Q1 GND Q2 Q2 VCC
20 19 18 17 16 15 14 13 12 11
LVPECL
LVPECL
LVPECL
ECL
ECL
ECL
1 2 3 4 5 6 7 8 9 10
VCC D0 D0
D1 D1
D2 D2 VEE
Table 1. PIN DESCRIPTION
PIN
FUNCTION
Dn, Dn
Qn, Qn
ECL VBB
VCC
VEE
GND
ECL Inputs
LVPECL Outputs
ECL Reference Voltage Output
Positive Supply
Negative Supply
Ground
* All VCC pins are tied together on the die.
Warning: All VCC, VEE, and GND pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 2. MAXIMUM RATINGS
Symbol
Parameter
Condition 1 Condition 2
Rating
Unit
VCC
PECL Power Supply
VEE
NECL Power Supply
VI
NECL Mode Input Voltage
Iout
Output Current
GND = 0 V
8 to 0
V
GND = 0 V
−8 to 0
V
GND = 0 V
VI w VEE
−6 to 0
V
Continuous
Surge
50
mA
100
mA
IBB
ECL VBB Sink/Source
± 0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
20 SOIC
500 lfpm
20 SOIC
90
°C/W
60
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board 20 SOIC
30 to 35
°C/W
Tsol
Wave Solder
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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