MC100LVEL91DW 查看數據表（PDF） - ON Semiconductor

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MC100LVEL91DW

3.3 V Triple LVPECL Input to −3.3 V to −5.0 V ECL Output Translator

ON Semiconductor 

MC100LVEL91

20 19 18 17 16 15 14 13 12 11

ECL

ECL

ECL

PECL/

LVPECL

PECL/

LVPECL

PECL/

LVPECL

1 2 3 4 5 6 7 8 9 10

Table 1. PIN DESCRIPTION

Pin

Function

Dn, Dn

Qn, Qn

PECL VBB

VCC

VEE

GND

PECL/LVPECL Inputs

ECL Outputs

PECL Reference Voltage Output

Positive Supply

Negative Supply

Ground

Figure 1. SO−20 Pinout (Top View) and Logic Diagram

* All VCC pins are tied together on the die.

Warning: All VCC, VEE, and GND pins must be externally

connected to Power Supply to guarantee proper operation.

Table 2. ATTRIBUTES

Characteristics

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

Human Body Model

Machine Model

Charged Device Model

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)

Flammability Rating

Oxygen Index: 28 to 34

Transistor Count

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

Value

75 kW

75 kW

> 2 kV

> 100 V

> 2 kV

Pb Pkg

Pb−Free Pkg

Level 1

Level 3

UL 94 V−0 @ 0.125 in

282 Devices

http://onsemi.com

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