MC10EPT20D(1999) 查看數據表（PDF） - ON Semiconductor
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MC10EPT20D Datasheet PDF : 4 Pages
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MC10EPT20
LVTTL/LVCMOS to
Differential LVPECL Translator
The MC10EPT20 is a LVTTL/LVCMOS to differential LVPECL
translator. Because LVPECL (Positive ECL) levels are used only
+3.3V and ground are required. The small outline 8–lead SOIC
package and the single gate of the EPT20 makes it ideal for those
applications where space, performance, and low power are at a
premium.
• 390ps Typical Propagation Delay
• High Bandwidth to 1.0 GHz Typical
• Differential LVPECL Outputs
• Small Outline SOIC Package
• PNP LVTTL Inputs for Minimal Loading
• VCC Range of 3.0V to 3.6V
• ESD Protection: >1.5KV HBM, >200V MM
• Q Output will default HIGH with inputs open
• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
• Transistor Count = 150 devices
NC 1
Q2
8 VCC
LVTTL 7 D
Q3
LVPECL
6 NC
http://onsemi.com
8
1
SO–8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
HPT20
ALYW
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional information, see Application Note
AND8002/D
PIN
Q, Q
D
VCC
GND
PIN DESCRIPTION
FUNCTION
Differential LVPECL Outputs
LVTTL Input
Positive Supply
Ground
NC 4
5 GND
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
ORDERING INFORMATION
Device
Package
Shipping
MC10EPT20D
SOIC
98 Units/Rail
MC10EPT20DR2 SOIC 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 1999
1
September, 1999 – Rev. 1.0
Publication Order Number:
MC10EPT20/D
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