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MC13027 查看數據表(PDF) - Motorola => Freescale

零件编号
产品描述 (功能)
生产厂家
MC13027
Motorola
Motorola => Freescale Motorola
MC13027 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MC13027 MC13122
I Det L–R Det
28
27
I
L–R
C–QUAM
Comparator
cosθ
L+R
Q Det VCC
26
25
Q
VCC
Blend
Disable
L–R
Figure 5. MC13122 Internal Block Diagram
Loop
Filt
Blend Gnd Pilot Ind Osc Out Osc In Pilot Det I Pilot I
24
23
22
21
20
19
18
17
Pilot Q
16
Audio
Blank
15
330
Signal
Quality
Detector
450 <90°
÷8
450 <0°
VCO
Loop
Driver
Fast Lock
Pilot
Level
Det
÷32
÷137/144
÷4
Pilot I
Det
Pilot Q
Det
25.6 Hz 24.4 Hz
Clamp
Count
Control
Fast AGC
Level
AGC
Matrix
3.0 V
IF Amp
1.0 V
L
R
VGA
VGA
±0.9
±0.9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
E Det Det In 3.0 V AGC IF In
Reg
SS
L Out L Filt In L Filt Ctr L Mat R Mat R Filt R Filt In R Out
Out
Out
Ctr
MC13122 FUNCTIONAL DESCRIPTION
The MC13122 is designed to accept a 450 kHz C–QUAM
input signal from approximately 1.0 mV to 1.0 V and produce
L and R audio output signals. It has additional features: stop
signal, variable bandwidth IF and audio response, stereo
indicator driver and track and hold noise blanking.
The IF amplifier on Pin 5 has its own AGC system. It
operates by varying the input resistance on Pin 5. With weak
signals below approximate 5.0 mV, the input resistance is
very high and the amplifier is at maximum gain. For this AGC
to be effective, it is necessary to feed the IF input signal from
a relatively high impedance. The input resistance variation
also reduces the Q of the coil (T1 in the application) so the
receiver bandwidth is narrow for weak signals and wide for
strong signals. The value of the input resistor (R5) is selected
for the desired loading of the IF coil. The impedance of the IF
coil on Pin 2 determines the IF gain. Pin 2 is also the input to
the C–QUAM decoder.
The IF signal drives the envelope (E), in–phase (I),
quadrature (Q) and (L–R) detectors. The E detector is a
quasi–synchronous true envelope detector. The others are
true synchronous detectors. The E detector output provides
the L+R portion of the C–QUAM signal directly to the matrix.
The AGC signal of the IF amplifier drives the signal strength
output at Pin 6. An external resistor on Pin 6 (sets the gain of
the AGC). The Pin 6 voltage is used to control the Q of the
audio notch filter, causing the audio bandwidth and depth of
the 10 kHz notch to change with signal strength. It is also
used as one of the inputs to the signal quality detector which
generates the stop–sense and blend signal on Pins 6 and 23
respectively and tells the signal quality detector that the RF
input is below the AGC threshold.
VCO
The 3.6 MHz ceramic resonator on Pins 19 and 20 is part
of a phase locked loop which locks to the 450 kHz IF signal.
The 3.6 MHz is divided by 8 to produce in–phase and
quadrature signals for the I, Q and L–R detectors. It is also
divided by 32, and 137/144 to provide signals for the pilot I
and Q detectors. The pilot detector is a unique circuit which
does not need filtering to detect the 25 Hz pilot.
Blend Circuit
The purpose of the blend circuit is to provide an AM stereo
radio with the capability of very fast lock times, protection
against stereo falsing when there is no pilot present and
control of the L–R signal so as to provide as much stereo
information as possible, while still sounding good in the
presence of noise or interference. The circuit also provides
an optional stop–sense usable by a radio with seek and/or
scan. The stop–sense signal provides a “stop” signal only
when the radio is locked on station, signal strength is above
minimum level, and the level of interference is less than a
predetermined amount. The last feature prevents stopping
on frequencies where there is is a multiplicity of strong
co–channel stations. It is common for AM radios without this
capability to stop on many frequencies with unlistenable
stations, especially at night.
The blend circuit controls the PLL fast lock, pilot detector,
IF amplifier AGC rate, decoder L–R gain, cosθ compensation
and stop–sense as a function of the voltage on a signal
external blend capacitor. Timing is determined by the rate of
change of voltage on the blend cap. Timing is changed by
varying charge and discharge current and pulled down by a
current source, switch, and optionally an external switch. The
current sources and switches are controlled by various
measures of signal quality, signal strength, and presence or
absence of pilot tone.
8
MOTOROLA ANALOG IC DEVICE DATA

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