MC33263(2006) 查看數據表（PDF） - ON Semiconductor
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MC33263
(Rev.:2006)
(Rev.:2006)
ON Semiconductor
MC33263 Datasheet PDF : 14 Pages
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Differential (Vin−Vout)
Input
C3 MC33263
+
+ C2
C1
Rpull−up
MC33263
Output
charge the bypass capacitor with the enable signal without
degrading the noise response of the MC33263.
At power−on, C4 is discharged. When the control logic
sends its wake−up signal by going to a high level, the PNP
base is momentarily tight to ground. The PNP switch closes
and immediately charges the bypass capacitor C1 toward its
operating value. After a few ms, the PNP opens and becomes
totally transparent to the regulator.
This circuit improves the response time of the regulator
which drops from 1.0 ms down to 30 ms. The value of C4
needs to be tweaked in order to avoid any bypass capacitor
overload during the wake−up transient.
Input
Output
ON/OFF
Figure 4. Copper Side Component Layout
This layout is the basis for an MC33263 performance
evaluation board where the BNC connectors give the user an
easy and quick evaluation mean.
MC33263 Wake−up Improvement − In portable
applications, an immediate response to an enable signal is
vital. If noise is not of concern, the MC33263 without a
bypass capacitor settles in nearly 20 ms and typically delivers
65 mVRMS between 100 Hz and 100 kHz.
In ultra low−noise systems, the designer needs a 10 nF
bypass capacitor to decrease the noise down to 25 mVRMS
between 100 Hz and 100 kHz. With the adjunction of the
10 nF capacitor, the wake−up time expands up to 1.0 ms as
shown on the data−sheet curves. If an immediate response
is wanted, following figure’s circuit gives a solution to
+ C3
1.0 mF
654
MC33263
On/Off
123
R2
220 k
+ C2
1.0 mF
C4
470 pF
MMBT2902LT1
Q1
C1
10 nF
Figure 5. A PNP Transistor Drives the
Bypass Pin when Enable Goes High (QFN6)
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