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33981 查看數據表(PDF) - Motorola => Freescale

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33981 Datasheet PDF : 24 Pages
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Freescale Semiconductor, Inc.
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33981 is a high-frequency self-protected silicon 4.0 m
RDS(ON) high-side switch used to replace electromechanical
relays, fuses, and discrete devices in power management
applications. The 33981 can be controlled by pulse-width
modulation (PWM) with a frequency up to 60 kHz. It is designed
for harsh environments, and it includes self-recovery features.
The 33981 is suitable for loads with high inrush current, as
well as motors and all types of resistive and inductive loads. A
dedicated parallel input is available for an external low-side
control with protection features and cross-conduction
management.
FUNCTIONAL DESCRIPTION
Sleep Mode
Sleep mode is the state of the 33981 when the EN is logic [0].
In this mode, OUT, the gate driver for the external MOSFET,
and all unused internal circuitry are off to minimize current draw.
The 33981 will go to the normal operating mode when the EN
terminal is logic [1]. The INHS and INLS commands will be
disabled typically 20 µs after the EN transitions to logic [1] to
enable the charge of the bootstrap capacitor.
Fault Logic
This 33981 indicates the faults below as they occur by
driving the FS terminal to logic [0]:
• Overtemperature
• Overcurrent fault on OUT
• Overload fault on the external low-side MOSFET
The FS terminal will return to logic [1] when the
overtemperature fault condition is removed. The two other
faults are latched.
Undervoltage
The latched faults are reset when the VPWR voltage is below
VPWR(UV).
Overtemperature Fault
The 33981 incorporates overtemperature detection and
shutdown circuitry on OUT. Overtemperature detection also
protects the bootstrap circuit (CBOOT terminal) and the low-side
gate driver (GLS terminal). Overtemperature detection occurs
when OUT is in the ON or OFF state and GLS is at high or low
level.
For OUT, an overtemperature fault condition results in OUT
turning OFF until the temperature falls below TSD. This cycle will
continue indefinitely until the offending load is removed.
Figure 12, page 16, shows an overtemperature on OUT.
An overtemperature fault on the bootstrap circuit or on the
low-side gate drive results in OUT turning OFF and the GLS
going to 0 V until the temperature falls below TSD. This cycle will
continue indefinitely until the offending load is removed. FS
terminal transition to logic [1] will be disabled typically 15 µs
after to enable the charge of the bootstrap capacitor.
Figure 13, page 17, shows an overtemperature on the
bootstrap circuit or on the low-side gate drive. As the
temperature increases, TEMP voltage decreases until thermal
shutdown.
Overtemperature faults force the TEMP terminal to 0 V.
Overcurrent Fault on High Side
The OUT terminal has a 100 A overcurrent high-detection
level for maximum device protection. If at any time the current
reaches this level, OUT will stay OFF and the CSNS terminal
will go to 0 V. The OUT terminal is reset by a logic [0] at the
INHS terminal for at least 200 µs. When INHS goes to 0 V,
CSNS goes to 5.0 V.
In Figure 11, page 16, the OUT terminal is short-circuited to
0 V. When the current reaches IOCH, OUT is turned OFF within
10 µs owing to internal logic circuit.
Overload Fault on Low Side
This fault detection is active when INLS is logic [1]. Low-side
overload protection does not measure the current directly but
rather its effects on the low-side MOSFET. When VGLS > VGSH
and VDLS > VDSH for at least 2.5 µs, the GLS terminal goes to
0 V and the OCLS internal current source is disconnected and
OCLS goes to 0 V. The GLS terminal and the OCLS terminal
are reset by a logic [0] at the INLS terminal for at least 200 µs.
When connected to an external resistor, the OCLS terminal
with its internal current source sets the VDSH level. By changing
the external resistance, the protection level can be adjusted
depending on low-side characteristics. A 3.3 kresistor gives
a VDSH level of 3.3 V typical.
This protection circuitry measures the voltage between the
drain of the low side (DLS terminal) and the 33981 ground
(GND terminal). It also uses the voltage across the external
resistance connected to the OCLS terminal and the GND
terminal. For this reason it is key that the low-side source, the
33981 ground, and the external resistance ground connection
are connected together in order to prevent false error detection
due to ground shifts.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
33981
19

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