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33981 查看數據表(PDF) - Motorola => Freescale

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33981 Datasheet PDF : 24 Pages
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Freescale Semiconductor, Inc.
Configuration
The CONF terminal manages the cross-conduction between
the internal MOSFET and the external low-side MOSFET. With
the CONF terminal at 0 V, the two MOSFETs can be
independently controlled. A load can be placed between the
high side and the low side.
With the CONF terminal at 5.0 V, the two MOSFETs cannot
be on at the same time. They are in half-bridge configuration as
shown in the simplified application diagram on page 1. If INHS
and INLS are at 5.0 V at the same time, INHS has priority and
OUT will be at VPWR. If INHS changes from 5.0 V to 0 V with
INLS at 5.0 V, GLS will go to high state as soon as the VGS of
the internal MOSFET is lower than TBD typically. A half-bridge
application could consist in sending PWM signal to the INHS
terminal and 5.0 V to the INLS terminal with the CONF terminal
at 5.0 V.
Figure 11, page 16, illustrates the simplified application
diagram on page 1 with a DC motor and external low side. The
CONF and INLS terminals are at 5.0 V. When INHS is at 5.0 V,
current is flowing in the motor. When INHS goes to 0 V, the load
current recirculates in the external low side.
Bootstrap Supply
Bootstrap supply provides current to recharge the bootstrap
capacitor through the VPWR terminal. A short time is required
after the application of power to the device to charge the
bootstrap capacitor. A typical value for this capacitor is 100 nF.
An internal charge pump allows continuous MOSFET drive.
When the device is in the sleep mode, this bootstrap supply is
off to minimize current consumption.
High-Side Gate Driver
The high-side gate driver switches the bootstrap capacitor
voltage to the gate of the MOSFET. The driver circuit has a low-
impedance drive to ensure that the MOSFET remains OFF in
the presence of fast falling dV/dt transients on the OUT
terminal.
This bootstrap capacitor connected between the power
supply and the CBOOT terminal provides the high pulse current
to drive the device. The voltage across this capacitor is limited
to about 13 V. CBOOT is protected against short by a local
overtemperature sensor.
An external capacitor connected between terminals SR and
GND is used to control the slew rate at the OUT terminal.
Low-Side Gate Driver
The low-side control circuitry is PWM capable. It can drive a
standard MOSFET with an RDS(ON) as low as 4.0 mat a
frequency up to 60 kHz. The VGS is internally clamped at 14 V
typically to protect the gate of the MOSFET. The GLS terminal
is protected against short by a local overtemperature sensor.
Thermal Feedback
The 33981 has an analog feedback output (TEMP terminal)
that provides a value proportional to the temperature of the
GND flag (terminal 13). The controlling microcontroller can
“read” the temperature proportional voltage with its analog-to-
digital converter (ADC). This can be used to provide real-time
monitoring of the PC board temperature to optimize the motor
speed and to protect the whole electronic system. TEMP
terminal value is typically 4.2 V at 25°C with a negative
temperature coefficient of 10 mV/K.
Reverse Battery
The 33981 survives the application of reverse battery voltage
as low as -16 V. Under these conditions, the output’s gate is
enhanced to decrease device power dissipation. No additional
passive components are required. The 33981 survives these
conditions until the maximum junction rating is reached.
In the case of reverse battery in a half-bridge application, a
direct current passes through the external freewheeling diode
and the internal high-side.
As Figure 17 shows, it is essential to protect this power line.
The proposed solution is an external low-side with its gate tied
to battery voltage through a resistor. A high-side in the VPWR
line could be another solution but with a more complex drive.
VDD
VPWR
33981
MCU
No current
GND OUT
VPWR
Diode M
Figure 17. Reverse Battery Protection
33981
20
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com

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