MC56F8345 查看數據表（PDF） - Motorola => Freescale
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MC56F8345 Datasheet PDF : 148 Pages
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Freescale Semiconductor, Inc.
56F8345 Data Sheet Table of Contents
Part 1: Overview . . . . . . . . . . . . . . . . . . . . 4
1.1. 56F8345 Features . . . . . . . . . . . . . . . . . . 4
1.2. 56F8345 Description . . . . . . . . . . . . . . . . 5
1.3. Award-Winning Development
Environment . . . . . . . . . . . . . . . 6
1.4. Architecture Block Diagram . . . . . . . . . . . 7
1.5. Product Documentation . . . . . . . . . . . . . 10
1.6. Data Sheet Conventions . . . . . . . . . . . . 11
Part 2: Signal/Connection Descriptions 12
2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 12
2.2. 56F8345 Signal Pins . . . . . . . . . . . . . . . 14
Part 3: On-Chip Clock Synthesis (OCCS) 29
3.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 29
3.2. External Clock Operation . . . . . . . . . . . 30
3.3. Registers . . . . . . . . . . . . . . . . . . . . . . . . 31
Part 4: Memory Map . . . . . . . . . . . . . . . . 32
4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 32
4.2. Program Map . . . . . . . . . . . . . . . . . . . . 33
4.3. Interrupt Vector Table . . . . . . . . . . . . . . 34
4.4. Data Map . . . . . . . . . . . . . . . . . . . . . . . . 38
4.5. Flash Memory Map . . . . . . . . . . . . . . . . 38
4.6. EOnCE Memory Map . . . . . . . . . . . . . . 40
4.7. Peripheral Memory Mapped Registers . 41
4.8. Factory Programmed Memory . . . . . . . . 65
Part 5: Interrupt Controller (ITCN) . . . . . 66
5.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 66
5.2. Features . . . . . . . . . . . . . . . . . . . . . . . . 66
5.3. Functional Description . . . . . . . . . . . . . . 66
5.4. Block Diagram . . . . . . . . . . . . . . . . . . . . 68
5.5. Operating Modes . . . . . . . . . . . . . . . . . . 68
5.6. Register Descriptions . . . . . . . . . . . . . . 69
5.7. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Part 6: System Integration Module (SIM) 94
6.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 94
6.2. Features . . . . . . . . . . . . . . . . . . . . . . . . 94
6.3. Operating Modes . . . . . . . . . . . . . . . . . . 95
6.4. Operating Mode Register . . . . . . . . . . . 95
6.5. Register Descriptions . . . . . . . . . . . . . . 96
6.6. Clock Generation Overview . . . . . . . . 109
6.7. Power-Down Modes Overview . . . . . . 109
6.8. Stop and Wait Mode Disable
Function . . . . . . . . . . . . . . . . 110
6.9. Resets . . . . . . . . . . . . . . . . . . . . . . . . . 110
Part 7: Security Features . . . . . . . . . . . 111
7.1. Operation with Security Enabled . . . . . 111
7.2. Flash Access Blocking Mechanisms . . 111
Part 8: General Purpose Input/Output
(GPIO) . . . . . . . . . . . . . . . . . . . . . 114
8.1. Introduction . . . . . . . . . . . . . . . . . . . . . 114
8.2. Configuration . . . . . . . . . . . . . . . . . . . . 114
8.3. Memory Maps . . . . . . . . . . . . . . . . . . . 118
Part 9: Joint Test Action Group (JTAG) 118
9.1. 56F8345 Information . . . . . . . . . . . . . . 118
Part 10: Specifications . . . . . . . . . . . . . 118
10.1. General Characteristics . . . . . . . . . . . 118
10.2. DC Electrical Characteristics . . . . . . . 122
10.3. Temperature Sense . . . . . . . . . . . . . . 125
10.4. AC Electrical Characteristics . . . . . . . 125
10.5. Flash Memory Characteristics . . . . . . 126
10.6. External Clock Operation Timing . . . . 127
10.7. Phase Locked Loop Timing . . . . . . . . 127
10.8. Crystal Oscillator Timing . . . . . . . . . . 128
10.9. Reset, Stop, Wait, Mode Select, and
Interrupt Timing . . . . . . . . . . . 128
10.10. Serial Peripheral Interface (SPI)
Timing . . . . . . . . . . . . . . . . . . 130
10.11. Quad Timer Timing . . . . . . . . . . . . . 133
10.12. Quadrature Decoder Timing . . . . . . . 133
10.13. Serial Communication Interface
(SCI) Timing . . . . . . . . . . . . . 134
10.14. Controller Area Network (CAN)
Timing . . . . . . . . . . . . . . . . . . 135
10.15. JTAG Timing . . . . . . . . . . . . . . . . . . 135
10.16. Analog-to-Digital Converter (ADC)
Parameters . . . . . . . . . . . . . . 137
10.17. Equivalent Circuit for ADC Inputs . . . 139
10.18. Power Consumptio . . . . . . . . . . . . n 139
Part 11: Packaging . . . . . . . . . . . . . . . . 141
11.1. Package and Pin-Out Information
56F8345 . . . . . . . . . . . . . . . . 141
Part 12: Design Considerations . . . . . . 144
12.1. Thermal Design Considerations . . . . . 144
12.2. Electrical Design Considerations . . . . 145
12.3. Power Distribution and I/O Ring
Implementation
146
Part 13: Ordering Information . . . . . . . 147
Please see http://www.motorola.com/semiconductors for the most current Data Sheet revision.
56F8345 Technical Data
3
Preliminary
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