Freescale Semiconductor, Inc.
2 Signal Descriptions
2.1 Pin Characteristics
Table 2 shows MCU pins and their characteristics. All inputs detect CMOS logic levels. All inputs can
be put in a high-impedance state, but the method of doing this differs depending upon pin function. Re-
fer to Table 4 for a description of output drivers. An entry in the discrete I/O column of Table 2 indicates
that a pin has an alternate I/O function. The port designation is given when it applies. Refer to Figure
1 for information about port organization.
Pin
Mnemonic
ADDR23/CS10
ADDR[22:19]/CS[9:6]
ADDR[18:0]
AS
AVEC
BERR
BG/CS1
BGACK/CS2
BKPT/DSCLK
BR/CS0
CLKOUT
CSBOOT
CTD[29:26]
CTD[10:4]
CTIO[5:0]
CTM31L
CTS24[B:A]
CTS18[B:A]
CTS14[B:A]
DATA[15:0]
DS
DSACK[1:0]
DSI/IFETCH
DSO/IPIPE
EXRTC
EXTAL
FC[2:0]/CS[5:3]
FREEZE/QUOT
HALT
IRQ[7:1]
MISO
MODCLK
MOSI
Table 2 MCU Pin Characteristics
Output
Driver
A
A
A
B
B
B
B
B
—
B
A
B
Ao
Ao
A
A
A
A
A
Aw
B
B
A
A
—
—
A
A
Bo
B
Bo
B
Bo
Input
Synchronized
Yes
Yes
Yes
Yes
Yes
Yes1
—
Yes
Yes
Yes
—
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes2
Yes
Yes
Yes
—
—
—
Yes
—
Yes1
Yes
Yes2
Yes2
Yes2
Input
Hysteresis
No
No
No
No
No
No
—
No
Yes
No
—
—
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
—
Yes
Yes
No
—
No
Yes
Yes
No
Yes
Discrete
I/O
—
O
—
I/O
I/O
—
—
—
—
—
—
—
I/O
I/O
I/O
I
I/O
I/O
I/O
—
I/O
I/O
—
—
—
—
O
—
—
I/O
I/O
I/O
I/O
Port
Designation
—
PC[6:3]
—
PE5
PE2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PE4
PE[1:0]
—
—
—
—
PC[2:0]
—
—
PF[7:1]
PQS0
PF0
PQS1
MC68CK338
MC68CK338TS/D
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MOTOROLA
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