MC74ACT273N 查看數據表（PDF） - ON Semiconductor
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MC74ACT273N Datasheet PDF : 8 Pages
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PDIP−20
20
MC74AC273N
AWLYYWWG
1
20
MC74ACT273N
AWLYYWWG
1
MC74AC273, MC74ACT273
MARKING DIAGRAMS
SOIC−20WB
20
AC273
AWLYYWWG
1
20
ACT273
AWLYYWWG
1
TSSOP−20
20
AC
273
ALYWG
G
1
20
ACT
273
ALYWG
G
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
SOEIAJ−20
20
74AC273
AWLYWWG
1
20
74ACT273
AWLYWWG
1
−A−
20
1
−T−
SEATING
PLANE
E
G
F
PACKAGE DIMENSIONS
PDIP−20
N SUFFIX
CASE 738−03
ISSUE E
11
B
10
C
K
N
D 20 PL
0.25 (0.010) M T A M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
L
M
J 20 PL
0.25 (0.010) M T B M
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 1.010 1.070 25.66 27.17
B 0.240 0.260 6.10 6.60
C 0.150 0.180 3.81 4.57
D 0.015 0.022 0.39 0.55
E 0.050 BSC
1.27 BSC
F 0.050 0.070 1.27 1.77
G 0.100 BSC
2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.140 2.80 3.55
L
0.300 BSC
7.62 BSC
M
0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
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