MCF5213(2006) 查看數據表（PDF） - Freescale Semiconductor

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MCF5213
(Rev.:2006)

Microcontroller Family Hardware Specification

Freescale Semiconductor 

MCF5213 Family Configurations

• Interrupt controller

— Uniquely programmable vectors for all interrupt sources

— Fully programmable level and priority for all peripheral interrupt sources

— Seven external interrupt signals with fixed level and priority

— Unique vector number for each interrupt source

— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)

— Support for hardware and software interrupt acknowledge (IACK) cycles

— Combinatorial path to provide wake-up from low power modes

• DMA controller

— Four fully programmable channels

— Dual-address transfer support with 8-, 16-, and 32-bit data capability, along with support for

16-byte (4 x 32-bit) burst transfers

— Source/destination address pointers that can increment or remain constant

— 24-bit byte transfer counter per channel

— Auto-alignment transfers supported for efficient block movement

— Bursting and cycle steal support

— Software-programmable DMA requesters for the UARTs (3) and 32-bit timers (4)

• Reset

— Separate reset in and reset out signals

— Seven sources of reset:

– Power-on reset (POR)

– External

– Software

– Watchdog

– Loss of clock

– Loss of lock

– Low-voltage detection (LVD)

— Status flag indication of source of last reset

• Chip integration module (CIM)

— System configuration during reset

— Selects one of six clock modes

— Configures output pad drive strength

— Unique part identification number and part revision number

MCF5213 Microcontroller Family Hardware Specification, Rev. 1.2

8

Preliminary

Freescale Semiconductor

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