MCM72PB8ML3.5R 查看數據表（PDF） - Motorola => Freescale
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MCM72PB8ML3.5R Datasheet PDF : 20 Pages
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DC CHARACTERISTICS AND SUPPLY CURRENTS
Parameter
Symbol
Min
Typ
Max
Unit Notes
Input Leakage Current (0 V ≤ Vin ≤ VDD)
Ilkg(I)
—
Output Leakage Current (0 V ≤ Vin ≤ VDDQ)
Ilkg(O)
—
AC Supply Current (Device Selected,
All Outputs Open, Freq = Max, VDD = Max, VDDQ = Max)
Includes Supply Current from Both VDD and VDDQ
IDDA
—
CMOS Standby Supply Current (Device Deselected, Freq = 0,
ISB2
—
VDD = Max, VDDQ = Max, All Inputs Static at CMOS Levels)
TTL Standby Supply Current (Device Deselected, Freq = 0,
VDD = Max, VDDQ = Max, All Inputs Static at TTL Levels)
ISB3
—
Clock Running (Device Deselected, Freq = Max,
VDD = Max, VDDQ = Max, All Inputs Toggling at
CMOS Levels)
ISB4
—
—
±1
µA
—
±1
µA
—
1700
mA 1, 2, 3
—
TBD
mA
4. 5
—
TBD
mA
4, 6
—
TBD
mA
4. 5
Static Clock Running (Device Deselected, Freq = Max,
VDD = Max, VDDQ = Max, All Inputs Static at TTL Levels)
ISB5
—
—
TBD
mA
4, 6
Output Low Voltage (IOL = 2 mA) VDDQ = 2.5 V
VOL1
—
—
0.7
V
Output High Voltage (IOH = – 2 mA) VDDQ = 2.5 V
VOH1
1.7
—
—
V
Output Low Voltage (IOL = 8 mA) VDDQ = 3.3 V
VOL2
—
—
0.4
V
Output High Voltage (IOH = – 4 mA) VDDQ = 3.3 V
VOH2
2.4
—
—
V
NOTES:
1. Reference AC Operating Conditions and Characteristics for input and timing.
2. All addresses transition simultaneously low (LSB) then high (MSB).
3. Data states are all zero.
4. Device is deselected as defined by the Truth Table.
5. CMOS levels for I/O’s are VIT ≤ VSS + 0.2 V or ≥ VDDQ – 0.2 V. CMOS levels for other inputs are Vin ≤ VSS + 0.2 V or ≥ VDD – 0.2 V.
6. TTL levels for I/O’s are VIT ≤ VIL or ≥ VIH2. TTL levels for other inputs are Vin ≤ VIL or ≥ VIH.
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 0 to 70°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Min
Typ
Input Capacitance
Input/Output Capacitance
Cin
—
—
CI/O
—
—
Max
Unit
16
pF
5
pF
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