MCP23017/MCP23S17
FIGURE 1-5:
SPI INPUT TIMING
CS (1)
1
6
Mode 1,1
SCK Mode 0,0
4
5
SI
MSB in
7
2
3
11
10
LSB in
SO
High-Impedance
Note 1: When using SPI Mode 1,1 the CS pin needs to be toggled once before the first communication after
power-up.
FIGURE 1-6:
SPI OUTPUT TIMING
CS
SCK
SO
SI
8
9
12
MSB out
13
Don’t Care
2
Mode 1,1
Mode 0,0
14
LSB out
TABLE 1-4: SPI INTERFACE REQUIREMENTS
SPI Interface AC Characteristics: Unless otherwise noted, 1.8V VDD 5.5V at -40C TA +125C
Param.
No.
Characteristic
Sym. Min. Typ. Max. Units
Conditions
— Clock Frequency
FCLK
—
—
—
—
—
—
1 CS Setup Time
2 CS Hold Time
TCSS
50
—
TCSH
100
—
50 —
3 CS Disable Time
TCSD
100
—
50 —
4 Data Setup Time
TSU
20 —
10 —
Note 1: This parameter is characterized, not 100% tested.
5 MHz 1.8V – 5.5V
10 MHz 2.7V – 5.5V
10 MHz 4.5V – 5.5V
—
ns
—
ns 1.8V – 5.5V
—
ns 2.7V – 5.5V
—
ns 1.8V – 5.5V
—
ns 2.7V – 5.5V
—
ns 1.8V – 5.5V
—
ns 2.7V – 5.5V
DS20001952C-page 8
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