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MCP3909(2006) 查看數據表(PDF) - Microchip Technology

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MCP3909 Datasheet PDF : 40 Pages
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MCP3909
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD ...................................................................................7.0V
Digital inputs and outputs w.r.t. AGND........ -0.6V to VDD +0.6V
Analog input w.r.t. AGND ..................................... ....-6V to +6V
VREF input w.r.t. AGND ............................... -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD on the analog inputs (HBM,MM) .................4.0 kV, 400V
ESD on all other pins (HBM,MM) ........................4.0 kV, 400V
† Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V to 5.5V,
Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
Parameter
Sym
Min Typ.
Max Units
Comment
Active Power Measurement Accuracy
Active Energy Measurement
E
Error
0.1
— % FOUT Channel 0 swings 1000:1 range,
FOUT0, FOUT1 Frequency outputs
only, does not apply to serial inter-
face data. (Note 1, Note 4)
No-Load Threshold/
Minimum Load
NLT
— 0.0015 — % FOUT Frequency outputs only, does not
Max apply to serial interface data.
Disabled when F2, F1, F0 = 0, 1, 1
(Note 5, Note 6)
System Gain Error
1
AC Power Supply Rejection AC PSRR — 0.01
(output frequency variation)
5
% FOUT (Note 2, Note 5)
— % FOUT F2, F1, F0 = 0, 1, 1 (Note 3)
DC Power Supply Rejection DC PSRR — 0.01
(output frequency
variation)
— % FOUT HPF = 1, Gain = 1 (Note 3)
Waveform Sampling
A/D Converter Signal-to-
SINAD —
81
dB Applies to both channels,
Noise and Distortion Ratio
VIN = 0 dBFS at 50 Hz
(VIN = Full Scale)
Bandwidth
14
kHz Applies to both channels,
(Notch Frequency)
MCLK/256
Phase Delay Between
Channels
— 1/MCLK s HPF = 0 and 1, < 1 MCLK period
(Note 4, Note 6, Note 7)
Note 1: Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is
measured with signal (±660 mV) on Channel 1. FOUT0, FOUT1 pulse outputs. Valid from 45 Hz to 75 Hz.
See typical performance curves for higher frequencies and increased dynamic range.
2: Does not include internal VREF. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between
measured output frequency and expected transfer function.
3: Percent of HFOUT output frequency variation; Includes external VREF = 2.5V, CH1 = 100 mVRMS @ 50 Hz,
CH2 = 100 mVRMS @ 50 Hz, AVDD = 5V + 1Vpp @ 100 Hz. DC PSRR: 5V ±500 mV
4: Error applies down to 60 degree lead (PF = 0.5 capacitive) and 60 degree lag (PF = 0.5 inductive).
5: Refer to Section 4.0 “Device Overview” for complete description.
6: Specified by characterization, not production tested.
7: 1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.
DS22025A-page 2
© 2006 Microchip Technology Inc.

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