MIC2582-XYM(2014) 查看數據表（PDF） - Micrel
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MIC2582-XYM Datasheet PDF : 27 Pages
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Micrel, Inc.
MIC2582/MIC5283
Pin Description (Continued)
Pin Number Pin Number
8-Pin SOIC 16-Pin QSOP
Pin Name
3
4
CPOR
4
7, 8
GND
5
12
FB
6
14
GATE
7
15
SENSE
8
16
VCC
n/a
2
PWRGD
n/a
5
CFILTER
n/a
11
/FAULT
Pin Function
Power-on-Reset timer: A capacitor connected between this pin and ground sets
the supply contact start-up delay (tSTART) and the power-on reset interval (tPOR).
When VCC rises above the UVLO threshold, and the ON pin is above the ON
threshold, the capacitor connected to CPOR begins to charge. When the voltage
at CPOR crosses 0.3V, the start-up threshold (VSTART), a start cycle is initiated if
ON is asserted while capacitor CPOR is immediately discharged to ground. When
the voltage at FB rises above VFB, capacitor CPOR begins to charge again. When
the voltage at CPOR rises above the power-on reset delay threshold (VTH), the
timer resets by pulling CPOR to ground, and /POR is de-asserted. If CPOR is left
open, then tSTART defaults to 20µs.
Ground connection: Tie to analog ground.
Power good threshold input (Undervoltage detect): This input is internally
compared to a 1.24V reference with 30mV of hysteresis. An external resistive
divider may be used to set the voltage at this pin. If this input momentarily goes
below 1.24V, then /POR is activated for one timing cycle, tPOR, indicating an
output undervoltage condition. The /POR signal de-asserts one timing cycle after
the FB pin exceeds the power good threshold by 30mV. A 5µs filter on this pin
prevents glitches from inadvertently activating this signal.
Gate drive output: Connects to the gate of an external N-channel MOSFET. An
internal clamp ensures that no more than 9V is applied between the GATE pin
and the source of the external MOSFET. The GATE pin is immediately brought
low when either the circuit breaker trips or an undervoltage lockout condition
occurs.
Circuit breaker sense input: A resistor between this pin and VCC sets the
current-limit threshold. Whenever the voltage across the sense resistor exceeds
the slow trip current-limit threshold (VTRIPSLOW), the GATE voltage is adjusted to
ensure a constant load current. If VTRIPSLOW (50mV) is exceeded for longer than
time period tOCSLOW, then the circuit breaker is tripped and the GATE pin is
immediately pulled low. If the voltage across the sense resistor exceeds the fast
trip circuit breaker threshold, VTRIPFAST, at any point due to fast, high amplitude
power supply faults, then the GATE pin is immediately brought low without delay.
To disable the circuit breaker, the SENSE and VCC pins can be tied together.
The default VTRIPFAST for either device is 100mV. Other fast trip thresholds are
available: 150mV, 200mV, or OFF (VTRIPFAST disabled). Please contact factory for
availability of other options.
Positive supply input: 2.3V to 13.2V. The GATE pin is held low by an internal
undervoltage lockout circuit until VCC exceeds a threshold of 2.2V. If VCC
exceeds 13.2V, an internal shunt regulator protects the chip from transient
voltages up to 20V at the VCC and SENSE pins.
Power good output: Open-drain N-channel device, active high. When the voltage
at the FB pin is lower than 1.24V, PWRGD output is held low. When the voltage
at the FB pin exceeds 1.24V, then PWRGD is asserted immediately. The
PWRGD pin requires a pull-up resistor (10kΩ minimum) to VCC.
Current-limit response timer: A capacitor connected to this pin defines the period
of time (tOCSLOW) in which an overcurrent event must last to signal a fault
condition and trip the circuit breaker. If no capacitor is connected, then tOCSLOW
defaults to 5µs.
Circuit breaker fault status output: Open-drain N-channel device, active low. The
/FAULT pin is asserted when the circuit breaker trips due to an overcurrent
condition or when an undervoltage lockout condition exists. The/FAULT pin
requires a pull-up resistor (10kΩ minimum) to VCC.
May 23, 2014
3
Revision 5.0
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