ML4804IS 查看數據表（PDF） - Fairchild Semiconductor

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ML4804IS

Power Factor Correction and PWM Controller Combo

Fairchild Semiconductor 

ML4804

FUNCTIONAL DESCRIPTION (Continued)

The output of the gain modulator is a current signal, in the

form of a full wave rectified sinusoid at twice the line

frequency. This current is applied to the virtual-ground

(negative) input of the current error amplifier. In this way

the gain modulator forms the reference for the current

error loop, and ultimately controls the instantaneous

current draw of the PFC from the power line. The general

form for the output of the gain modulator is:

IGAINMOD

=

IAC × VEAO

VRMS2

× 1V

((1)

More exactly, the output current of the gain modulator is

given by:

IGAINMOD = K × (VEAO − 0.625V) × IAC

where K is in units of V-1.

Note that the output current of the gain modulator is

limited to 500µA.

Current Error Amplifier

The current error amplifier’s output controls the PFC duty

cycle to keep the average current through the boost

inductor a linear function of the line voltage. At the

inverting input to the current error amplifier, the output

current of the gain modulator is summed with a current

which results from a negative voltage being impressed

upon the ISENSE pin. The negative voltage on ISENSE

represents the sum of all currents flowing in the PFC

circuit, and is typically derived from a current sense

resistor in series with the negative terminal of the input

bridge rectifier. In higher power applications, two current

transformers are sometimes used, one to monitor the ID of

the boost MOSFET(s) and one to monitor the IF of the

boost diode. As stated above, the inverting input of the

current error amplifier is a virtual ground. Given this fact,

and the arrangement of the duty cycle modulator

polarities internal to the PFC, an increase in positive

current from the gain modulator will cause the output

stage to increase its duty cycle until the voltage on

ISENSE is adequately negative to cancel this increased

current. Similarly, if the gain modulator’s output

decreases, the output duty cycle will decrease, to

achieve a less negative voltage on the ISENSE pin.

Cycle-By-Cycle Current Limiter

The ISENSE pin, as well as being a part of the current

feedback loop, is a direct input to the cycle-by-cycle

current limiter for the PFC section. Should the input

voltage at this pin ever be more negative than -1V, the

output of the PFC will be disabled until the protection

flip-flop is reset by the clock pulse at the start of the next

PFC power cycle.

TriFault DetectTM

To improve power supply reliability, reduce system

component count, and simplify compliance to UL 1950

safety standards, the ML4800 (ML4804) includes TriFault

Detect. This feature monitors VFB (Pin 15) for certain PFC

fault conditions.

In the case of a feedback path failure, the output of the

PFC could go out of safe operating limits. With such a

failure, VFB will go outside of its normal operating area.

Should VFB go too low, too high, or open, TriFault Detect

senses the error and terminates the PFC output drive.

TriFault detect is an entirely internal circuit. It requires no

external components to serve its protective function.

VFB

15

2.5V

IAC

2

VRMS

4

ISENSE

3

16

VEAO

1

IEAO

VEA

–

+

1.6kΩ

IEA

+

–

GAIN

MODULATOR

1.6kΩ

0.5V

TRI-FAULT

+

–

VCC

16.4V

VCCOVP

+

–

+

–

2.75V

OVP

+

–

–1V +

–

PFC ILIMIT

RAMP 1

7

OSCILLATOR

SQ

RQ

SQ

RQ

PFC OUT

12

Figure 1. PFC Section Block Diagram

8

REV. 1.0.2 3/9/2001

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