MPC961C 查看數據表（PDF） - Motorola => Freescale
零件编号
产品描述 (功能)
生产厂家
MPC961C Datasheet PDF : 12 Pages
| |||
Freescale Semiconductor, Inc.
MPC961C
Table 3: ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Min
Max
Unit
VCC
VIN
VOUT
IIN
IOUT
TS
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Current
DC Output Current
Storage Temperature Range
–0.3
3.6
V
–0.3
VCC + 0.3
V
–0.3
VCC + 0.3
V
±20
mA
±50
mA
–40
125
°C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
Table 4: DC CHARACTERISTICS (VCC = 3.3V ± 5%, TA = –40° to 85°C)
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
VIH
Input HIGH Voltage
2.0
VCC + 0.3
V
LVCMOS
VIL
VOH
VOL
ZOUT
IIN
Input LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Output Impedance
Input Current
–0.3
0.8
V LVCMOS
2.4
V
IOH = –20mAa
0.55
V
IOL = 20mAa
14
20
W
±120
µA
CIN
Input Capacitance
4.0
pF
CPD
Power Dissipation Capacitance
8.0
10
pF Per Output
ICCA
Maximum PLL Supply Current
2.0
5.0
mA VCCA Pin
ICC
Maximum Quiescent Supply Current
VTT
Output Termination Voltage
B VCC 2
mA All VCC Pins
V
a. The MPC961C is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives up two 50Ω series terminated transmission lines.
Table 5: AC CHARACTERISTICS (VCC = 3.3V ± 5%, TA = –40° to 85°C)a
Symbol
Characteristic
Min
Typ
Max
Unit
Condition
fref
Input Frequency
F_RANGE = 0
100
F_RANGE = 1
50
200
MHz
100
fmax
Maximum Output Frequency
F_RANGE = 0
100
F_RANGE = 1
50
200
MHz
100
frefDC
Reference Input Duty Cycle
25
75
%
tr, tf
TCLK Input Rise/Fall Time
3.0
ns 0.8 to 2.0V
t(∅)
Propagation Delay
(static phase offset)
CCLK to FB_IN
–80
120
ps PLL locked
tsk(O)
Output–to–Output Skewb
90
150
ps
DCO
Output Duty Cycle
F_RANGE = 0
42
50
55
%
F_RANGE = 1
45
50
55
tr, tf
Output Rise/Fall Time
0.1
tPLZ,HZ Output Disable Time
tPZL,LZ Output Enable Time
tJIT(CC) Cycle–to–Cycle Jitter
RMS (1 s)c
tJIT(PER) Period Jitter
RMS (1 s)
7.0
tJIT(∅)
I/O Phase Jitter
RMS (1 s)
tlock
Maximum PLL Lock Time
W a. AC characteristics apply for parallel output termination of 50 to VTT
b. See applications section for part–to–part skew calculation
s c. See applications section for calculation for other confidence factors than 1
1.0
ns 0.55 to 2.4V
10
ns
10
ns
15
ps
10
ps
15
ns
10
ms
TIMING SOLUTIONS
DL207 — Rev 0
For More Informa3tion On This Product,
Go to: www.freescale.com
MOTOROLA
Share Link: 