CXB1565R 查看數據表（PDF） - Sony Semiconductor

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CXB1565R

622Mbps Clock & Data Recovery with High Sensitivity Limitting Amplifier

Sony Semiconductor 

CXB1565R

Typical pin

Pin No. Symbol voltage (V)

DC AC

23 VEER3 0

24 HYS 0.3

25 DOWN 4.4

26 VCCR2 5

27 VCCR1 0

Equivalent circuit

Bias

Generator

25

VCCR2

24

VEER3

VCCR2

VEER3

Description

Ground for signal detector.

Connect to VEER3 through a

external resistor determine

signal detect hysteresis width

(∆P).

When connect to VEER3 directly.

∆P ≈ 6dB (Typ.)

When 8.2kΩ is inserted.

∆P ≈ 3dB (Typ.)

Connect to VCCR2 through a

external resistor to decrease

signal detect level (SDL). When

open, SDL sets to 20mVp-p.

(single-ended)

Positive supply for signal

detector.

Positive supply for post amplifier.

28 D

29 DN

34 CAP1 3.7

35 CAP1B 3.7

28

29

VEER1

VCCR1

Serial data stream inputs.

34

35

VEER2

Connect a external capacitor,

which determines low cut-off

frequency for feedback block.

Typically 0.022µF.

30, 31 VEER2 0

32, 36 NC

33 VEER1 0

37, 38 VCCP 5

Ground for post amplifier.

No connect

Ground for post amplifier.

Both VEER1 and VEER2 must be

grounded.

Positive supply for PLL circuits.

–4–

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