MS81V04160-25TB 查看數據表（PDF） - Oki Electric Industry

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MS81V04160-25TB

Dual FIFO (262,214-word x 8-Bits) x 2

Oki Electric Industry 

MS81V04160

OKI Semiconductor

Output Enable: OE2

OE2 is used to enable/disable the outputs. OE2 high level enables the outputs. The internal

read address pointer is always incremented by cycling SRCK regardless of the OE2 level.

Note that OE2 setup and hold times are referenced to the rising edge of SRCK.

Mode Setting: MODE1

The Cascade/Non cascade select pin. Setting the MODE1 pin to the Vcc level configures

this memory device as cascade type and setting the pin to the Vss level configures this

memory device as non cascade. During memory operation, the pin must be permanentry

connected to Vcc or Vss. If a MODE1 level is changed during memory operation, memory

data is not guaranteed.

Note: Cascade/Non cascade

When MODE1 is set to the Vss level, memory accessing starts in the cycle in which the

control signals are input (Non cascade type).

When MODE1 is set to the Vcc level, memory accessing starts in the cycle subsequent to

the cycle in which the control signals are input (Cascade type). This type is used for

consecutive memory accessing.

MODE2 Setting: MODE2

MODE2 selects whether the control input signals are enabled at a high level or a low level.

Setting MODE2 to the Vcc level enables the control input signals at a low level and setting

MODE2 to the Vss level enables the control input signals at a high level.

MODE Setting: MODE3

The boost control pin for data-out Buffer. For the MS8104160, the MODE3 pin should be

permanentry Connected to the Vss level.

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