MS81V04160A 查看數據表（PDF） - Oki Electric Industry

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MS81V04160A

Dual FIFO (262,214 Words × 8 Bits) × 2

Oki Electric Industry 

1Semiconductor

FEDS81V04160A-01

MS81V04160A

Write Cycle Timing (Write Reset): MODE1 = VSS, MODE2 =VSS

n cycle

0 cycle

1 cycle

2 cycle

VIH

SWCK

tRSTWS

tRSTWH

VIL

tWSWH tWSWL

tSWC

VIH

RSTW1, 2

VIL

tDS tDH

VIH

DI

n

0

1

2

3

10-17/20-27

VIL

VIH

WE1, 2

VIL

VIH

IE1, 2

VIL

Write Cycle Timing (Write Enable): MODE1 = VSS, MODE2 =VSS

n cycle

Disable cycle Disable cycle

n + 1 cycle

VIH

SWCK

tWENH

tWDSH

tWDS

tWENS

VIL

WE1, 2

tWWEL

tWWEH

DI

n

10-17/20-27

VIH

VIL

VIH

n+1

n

VIL

VIH

IE1, 2

VIL

VIH

RSTW1, 2

VIL

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