¡ Semiconductor
MSM9006-01, -02
Switching Characteristics
Paramater
Clock Frequency
Clock Pulse Width
Rise/Fall Time
Data Setup Time
Data Hold Time
Load Pulse Width
ClockÆLoad Time
LoadÆClock Time
Output Delay Time 1
Output Delay Time 2
Symbol
fCP
tWCP
tr, tf
tDSU
tDHD
tWLD
tCL
tLC
tpd1
tpd2*1
Condition
—
—
—
—
—
—
—
—
CL=50pF
—
(VDD=5V±10%, Ta=–40 to +85°C)
Min.
Max.
Unit
—
2.0
MHz
200
—
ns
—
50
ns
100
—
ns
100
—
ns
200
—
ns
100
—
ns
200
—
ns
—
300
ns
—
300
ns
*1 Since the DATA I/O pin input-output state is undefined for 300ns after the rising edge of
LOAD when changing from output mode to input mode, do not input any signal to the
DATA I/O pin for this period.
tWCP
tWCP
tr
CLOCK
0.8VDD
tf
0.2VDD
tDSU tDHD
DATAI/O
0.8VDD
1/fCP
0.2VDD
(During input mode)
0.8VDD
0.2VDD
tWLD
LOAD
tCL
0.8VDD
tLC
0.2VDD
DATAI/O (When changing from input mode to output mode)
HiZ
tpd1
tpd1
0.8VDD
0.2VDD
tpd2
DATAI/O (When changing from output mode to intput mode)
HiZ The duration of charge or discharge at
the high-impedance period is determined
by the wiring resistance and the wiring
capacitance.
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