MT16VDDF12864H 查看數據表（PDF） - Micron Technology

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MT16VDDF12864H

SMALL-OUTLINE DDR SDRAM DIMM

Micron Technology 

512MB, 1GB (x64)

200-PIN DDR SODIMM

Table 13: IDD Specifications and Conditions – 1GB

Notes: 1–5, 8, 10, 12, 48; DDR SDRAM devices only; notes appear on pages 20–23; 0°C £ TA £ +70°C; VDD, VDDQ = +2.5V ±0.2V

MAX

PARAMETER/CONDITION

SYM

OPERATING CURRENT: One device bank; Active-

Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM and

DQS inputs changing once per clock cycle; Address and

control inputs changing once every two clock cycles

OPERATING CURRENT: One device bank; Active-Read-

Precharge; Burst = 4; tRC = tRC (MIN); tCK = tCK (MIN);

IOUT = 0mA; Address and control inputs changing once

per clock cycle

PRECHARGE POWER-DOWN STANDBY CURRENT: All

device banks idle; Power-down mode; tCK = tCK (MIN);

CKE = (LOW)

IDLE STANDBY CURRENT: CS# = HIGH; All device banks

are idle; tCK = tCK (MIN); CKE = HIGH; Address and other

control inputs changing once per clock cycle. VIN = VREF

for DQ, DQS, and DM

IDD0

IDD1

IDD2P

IDD2F

ACTIVE POWER-DOWN STANDBY CURRENT: One device

bank active; Power-down mode; tCK = tCK (MIN);

CKE = LOW

ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;

One device bank active; tRC = tRAS (MAX); tCK = tCK

(MIN); DQ, DM and DQS inputs changing twice per clock

cycle; Address and other control inputs changing once per

clock cycle

OPERATING CURRENT: Burst = 2; Reads; Continuous

burst; One device bank active; Address and control inputs

changing once per clock cycle; tCK = tCK (MIN); IOUT =

0mA

IDD3P

IDD3N

IDD4R

OPERATING CURRENT: Burst = 2; Writes; Continuous

burst; One device bank active; Address and control

inputs changing once per clock cycle; tCK = tCK (MIN); DQ,

DM, and DQS inputs changing twice per clock cycle

IDD4W

AUTO REFRESH BURST CURRENT:

SELF REFRESH CURRENT: CKE £ 0.2V

tRC = tRFC (MIN)

tRC = 7.8125µs

IDD5

IDD5A

IDD6

OPERATING CURRENT: Four device bank interleaving

READs (Burst = 4) with auto precharge, tRC = minimum

tRC allowed; tCK = tCK (MIN); Address and control inputs

change only during Active READ, or WRITE commands

IDD7

-335

1,080

1,320

80

720

560

720

1,360

1,280

4,640

160

80

3,280

-262

1,080

-26A/-

265

960

-202

960

UNIT NOTE

S

S

mA 20, 42

1,320 1,200 1,200 mA 20, 42

80

80

80

mA 21, 28,

44

720

640

640 mA 45

560

480

480 mA 21, 28,

44

720

640

640 mA 41

1,360 1,200 1,200 mA 20, 42

1,280 1,120 1,120 mA 20

4,640

160

80

3,240

4,480

160

80

2,840

4,480

160

80

2,840

mA 20, 44

mA 24, 44

mA 9

mA 20, 43

NOTE:

a - Value calculated as one module rank in this operating condition, and all other module ranks in IDD2p (CKE LOW) mode.

b - Value calculated reflects all module ranks in this operating condition.

09005aef80a646bc

DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN

15

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2003 Micron Technology, Inc.

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