MT48LC16M8A2TG-7ELIT 查看數據表（PDF） - Micron Technology

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MT48LC16M8A2TG-7ELIT

SYNCHRONOUS DRAM

Micron Technology 

128Mb: x4, x8, x16

SDRAM

FUNCTIONAL BLOCK DIAGRAM

8 Meg x 16 SDRAM

CKE

CLK

CS#

WE#

CAS#

RAS#

CONTROL

LOGIC

BANK3

BANK2

BANK1

MODE REGISTER

12

A0-A11,

BA0, BA1

14

ADDRESS

REGISTER

REFRESH 12

COUNTER

ROW-

12

ADDRESS

MUX

12

BANK0

ROW-

ADDRESS

LATCH

&

DECODER

4096

BANK0

MEMORY

ARRAY

(4,096 x 512 x 16)

SENSE AMPLIFIERS

4096

2

BANK

CONTROL

LOGIC

2

COLUMN-

ADDRESS

9

9

COUNTER/

LATCH

I/O GATING

DQM MASK LOGIC

READ DATA LATCH

WRITE DRIVERS

512

(x16)

COLUMN

DECODER

2

2

DATA

16

OUTPUT

REGISTER

16

DATA

16

INPUT

REGISTER

DQML,

DQMH

DQ0-

DQ15

128Mb: x4, x8, x16 SDRAM

128MSDRAM_E.p65 – Rev. E; Pub. 1/02

7

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2001, Micron Technology, Inc.

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