CY7C4804V25 查看數據表（PDF） - Cypress Semiconductor

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CY7C4804V25

2.5V 4K/16K/64K x 80 Unidirectional Synchronous FIFO w/Bus Matching

Cypress Semiconductor 

Pin Description

Pin

VDDQ

VDD

GND

VREF

MR

PR

A0–A79

B0–B79

ENA

ENB

CSA

CSB

OE

CLKA

CLKB

BE/FWFT

SIZE1A, SIZE2A

SIZE1B, SIZE2B

RT/SPM

TDI, TDO, TCK, TMS, TRST

FS1/SEN, FS0/SD

EF/OR

FF/IR

AE

AF

PRELIMINARY

CY7C4808V25

CY7C4806V25

CY7C4804V25

Description

Power supply for I/Os

Power supply for internal logic

Ground

Reference voltage

Master reset

Partial reset

Input data bus

Output data bus

Port A enable pin

Port B enable pin

Port A chip select

Port B chip select

Output enable

Port A clock

Port B clock

Big/Little Endian and CY Standard/First-Word Fall-Through mode select pin

Port A bus size configuration pins

Port B bus size configuration pins

Retransmit pin/serial programming select

JTAG pins

Programmable flags configuration pins

Empty/Output Ready flag (Port B)

Full/Input Ready flag (Port A)

Programmable Almost Empty flag (Port B)

Programmable Almost Full flag (Port A)

6

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