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CY7C4804V25 查看數據表(PDF) - Cypress Semiconductor

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CY7C4804V25 Datasheet PDF : 30 Pages
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PRELIMINARY
CY7C4808V25
CY7C4806V25
CY7C4804V25
DC Specifications (continued)[4]
Parameter
Description
Conditions
200 MHz
166 MHz
Unit
ICC
Operating current (Typical)
VDD = max.,
225
185
mA
Operating current (Max.)
IOUT = 0 mA
300
250
mA
AC Specifications (A 50load terminated into 0.75V is used with VDDQ)
Parameter
FMAX
tCYC
tSD
tHD
tA
Description
Max. Frequency
Clock Cycle Time
Input Data Set-Up Time
Input Data Hold Time
Access Time
Min.
5
0.9
0.6
3.3
CY7C480XV25
Max.
200
AC Test Loads and Waveforms
VREF
Output
(VDDQ)/2
VTH = (VDDQ)/2
RL = 50
ZO = 50
VREF
Output
(VDDQ)/2
VTH = (VDDQ)/2
RL = 50
5 pF
Device
Under
Test
(a) Test Loads
Device
Under
Test
(b) Test Loads
1.25V
0.75V
0.25V
10%
[5]
ALL INPUT PULSES
90%
tR
tR 0.5 ns, tF 0.5 ns
90%
10%
tF
Unit
MHz
ns
ns
ns
ns
Notes:
4. Both clocks switching at maximum speeds, data switching at half the clock frequency.
5. Unless otherwise noted, test conditions assume signal transition time of 2 V/ns, timing reference levels of 0.75V, Vref = 0.75V, RQ = 250Ω, VDDQ = 1.5V, input
pulse levels of 0.25V to 1.25V, and output loading of the specified IOL/IOH and load capacitance shown in (b) of AC test loads.
8

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