VSC6464 查看數據表（PDF） - Vitesse Semiconductor
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VSC6464 Datasheet PDF : 10 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC6464
64x64 Crosspoint Switch
Figure 5 VSC6464 Synchronous Data Output Timing Diagram
CKO
DOUT<63:0>
TSMX
TSMN TSSKW
Table 5: VSC6464 Synchronous Data Output Timing Table
Parameters
FMAX
TSMX
TSMN
TSSKW
Description
Maximum CKO frequency, 50% input
Maximum propagation delay CKO toDOUT<63:0>
Minimum propagation delay CKO to DOUT<63:0>
DOUT<63:0> synchronous mode data skew
(add 0.1 for SSO)
Min
Typ
Max
-
-
250
-
-
3.7
1.4
-
-
-
-
0.75
Figure 6 VSC6464 Synchronous Mode Clock Relationship
Units
MHz
ns
ns
ns
CKI
CKO
T
TCC
Table 6: VSC6464 Synchronous Data Output Timing Table
Parameters
Description
Min
Typ
Max
Units
TCC
CKO relative to CKI, 50% input
0.1
-
0.8
ns
Note: A nominal delay of 0.25 ns between input and output clocks can be achieved by a trace on the pc board run directly from
the input clock pin to the output clock pin. In this case, the clock signal should be connected to the input pin with the delay
supplied by the pc board trace.
G52219-0, Rev. 2.0
8/4/98
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