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MXB7846(2004) 查看數據表(PDF) - Maxim Integrated

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MXB7846 Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2.375V to 5.25V, 4-Wire Touch-Screen Controller
with Internal Reference and Temperature Sensor
TIMING CHARACTERISTICS (Figure 1)
(VDD = 2.7V to 3.6V, VREF = 2.5V, fDCLK = 2MHz (50% duty cycle), fSAMPLE = 125kHz, 12-bit mode, 0.1µF capacitor at REF, TA =
TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
TIMING CHARACTERISTICS (Figure 1)
Acquisition Time
DCLK Clock Period
tACQ
tCP
DCLK Pulse Width High
tCH
DCLK Pulse Width Low
tCL
DIN-to-DCLK Setup Time
tDS
DIN-to-DCLK Hold Time
CS Fall-to-DCLK Rise Setup Time
CS Rise-to-DCLK Rise Ignore
DCLK Falling-to-DOUT Valid
CS Rise-to-DOUT Disable
CS Fall-to-DOUT Enable
tDH
tCSS
tCSH
tDO
tTR
tDV
DCLK Falling-to-BUSY Rising
CS Falling-to-BUSY Enable
CS Rise-to-BUSY Disable
tBD
tBDV
tBTR
CONDITIONS
CLOAD = 50pF
CLOAD = 50pF
CLOAD = 50pF
MIN TYP MAX UNITS
1.5
µs
500
ns
200
ns
200
ns
100
ns
0
ns
100
ns
0
ns
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
Note 1: Tested at VDD = 2.7V.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Offset nulled.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5: Resistance measured from the source to drain of the switch.
Note 6: External load should not change during conversion for specified accuracy.
Note 7: ADC performance is limited by the conversion noise floor, typically 300µVP-P. An external reference below 2.5V can com-
promise the ADC performance.
Note 8: Difference between Temp0 and Temp1. No calibration necessary.
4 _______________________________________________________________________________________

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