NB2304AI2DR2G 查看數據表（PDF） - ON Semiconductor

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NB2304AI2DR2G

3.3 V Zero Delay Clock Buffer

ON Semiconductor 

VDD

0.1 mF

OUTPUTS

VDD

0.1 mF GND GND

CLOAD

NB2304A

TEST CIRCUITS

VDD

0.1 mF

OUTPUTS

VDD

0.1 mF GND GND

VDD

1 kW

1 kW

10 pF

Figure 9. Test Circuit #1

REF

PLL

Figure 10. Test Circuit #2

For parameter t8 (output slew rate) on −1H devices

BLOCK DIAGRAMS

FBK

CLKA1

CLKA2

CLKB1

REF

PLL

B2

FBK

CLKA1

CLKA2

CLKB1

CLKB2

Figure 11. NB2304Ax1 and NB2304Ax1H

Figure 12. NB2304Ax2

CLKB2

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