NCP370(2008) 查看數據表（PDF） - ON Semiconductor

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NCP370
(Rev.:2008)

Positive and Negative Overvoltage Protection with Internal Low RON N-MOSFETs and Reverse Charge Control Pin

ON Semiconductor 

NCP370

The FLAG pin goes low as soon the input voltage exceeds

the OVLO threshold or falls below the UVLO threshold.

When the Vin level recovers normal condition, FLAG goes

high after a time delay, tstart (see Figure 3), following the Vout

response. The FLAG pin is an open drain output and

therefore a pull up resistor (typically 1 MW, minimum

10 kW) must be connected to Battery. The FLAG level will

always reflect Vin status, even if the device is turned off (DIR

= 0).

Vin

OVLO

UVLO

Vout

FLAG

DIR

REV

tdis

> 1.2 V

ton tstart

toff

ton

tstart

tstop

Figure 3. FLAG Pin in AC/DC Charging Mode

During over thermal condition (T°J>T°SD), output is

disconnected from input, and FLAG pin goes low.

In Reverse Mode, FLAG pin remains available, allowing

the micro−controller to appropriately process the

overvoltage condition, overcurrent condition or thermal

shutdown condition.

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