NCP370(2008) 查看數據表（PDF） - ON Semiconductor

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NCP370
(Rev.:2008)

Positive and Negative Overvoltage Protection with Internal Low RON N-MOSFETs and Reverse Charge Control Pin

ON Semiconductor 

Vin

Vout

tonrev

FLAG

DIR

NCP370

Battery

Output

REV

micro−controller

micro−controller

External Accessory ID = 1

Figure 4. FLAG status in Reverse Mode

Table 1. FLAG TABLE

DIR

REV

IN

OUT

FLAG

Status

Pass Element (Dual NMOS FET)

0

0

1.5 < Vin < UVLO or

Vin > OVLOoo

Hiz

Low

Open

0

0

0

1

UVLO < Vin < OVLOoo

1.5 < Vin < UVLO or

Vin > OVLO

= Vin−DROPOUT

Hiz

High

Low

Close

Open

0

1

1

0

1

1

UVLO < Vin < OVLO

= Vout−DROPOUT

1.5 < Vin < UVLO or

Vin > OVLO

= Vin−DROPOUT

Vout > 2.5 V

Hiz

High

High

Low

Close

Close

Open

1

1

UVLO < Vin < OVLO

DIR Input

To enable Direct Charge operation (Direct Mode), the

DIR pin shall be forced to low and REV to high. A high level

on the DIR pin disconnects OUT pin from IN pin. DIR does

not over−ride an OVLO or UVLO fault (FLAG status is still

available).

Hiz

High

Open

Table 2. TABLE SELECTION OF CHARGE MODES

DIR

REV

Mode

0

0

Enhance Mode

0

1

Direct Mode

1

0

Reverse Mode

1

1

Disable Mode

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