NCP694DADJHT1G(2010) 查看數據表（PDF） - ON Semiconductor

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NCP694DADJHT1G
(Rev.:2010)

1A CMOS Low-Dropout Voltage Regulator

ON Semiconductor 

654

123

(TOP VIEW)

5

4

NCP694

HSON−6

SOT−89−5

456

3 21

(BOTTOM VIEW)

4

5

1

2

3

(TOP VIEW)

Figure 1. Pin Description

3

21

(BOTTOM VIEW)

PIN FUNCTION DESCRIPTION FOR SOT−89−5 PACKAGE

Pin No.

Pin Name

Description

1

ADJ/NC

Adjust pin for NCP694DADJHT1G and NCP694HADJHT1G / No connection

2

GND

Power supply ground

3

CE

This input is used to place the device into low−power standby. When this input is pulled low, the

device is disabled. If this function is not used, Enable should be connected to Vin.

4

Vin

Positive power supply input voltage.

5

Vout

Regulated output voltage.

PIN FUNCTION DESCRIPTION FOR HSON−6 PACKAGE

Pin No.

Pin Name

Description

1

Vout

Regulated output voltage

2

Vout

Regulated output voltage

3

ADJ / NC

Adjust pin for NCP694DSANADJT1G and NCP694HSANADJT1G / No connection

4

GND

Power supply ground

5

CE

This input is used to place the device into low power standby. When this input is pulled low, the

device is disabled. If this function is not used, Enable should be connected to Vin.

6

Vin

Positive power supply input voltage

Vin

Vout Vin

Vin

Vout Vin

Vout

Vout

Vref

Current Limit&

CE

Thermal Shutdown

CE

GND

Vref

Current Limit&

Thermal Shutdown

GND

Version H (NCP694HxxxxT1G)

Version D (NCP694DxxxxT1G)

Figure 2. Internal Block Diagram

http://onsemi.com

2

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