NCV4275DS 查看數據表（PDF） - ON Semiconductor
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NCV4275DS Datasheet PDF : 14 Pages
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NCV4275
APPLICATION INFORMATION
VI
II
CI1
CI2
I1
5Q
IQ
CQ
VQ
1000 μF
100 nF
NCV4275
22 μF
Rext
5.0 k
ID
CD
D4
3
2 RO
IRO
VRO
47 nF
GND
Iq
Figure 13. Test Circuit
Circuit Description
The NCV4275 is an integrated low dropout regulator that
provides 5.0 V, 450 mA protected output and a signal for
power on reset. The regulation is provided by a PNP pass
transistor controlled by an error amplifier with a bandgap
reference, which gives it the lowest possible drop out
voltage and best possible temperature stability. The output
current capability is 450 mA, and the base drive quiescent
current is controlled to prevent over saturation when the
input voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures. The delay time for the reset output is
adjustable by selection of the timing capacitor. See
Figure 13, Test Circuit, for circuit element nomenclature
illustration.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (VQ) and drives the base of a
PNP series pass transistor by a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Over saturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized.
Regulator Stability Considerations
The input capacitors (CI1 and CI2) are necessary to
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with CI2 can stop potential oscillations caused by
stray inductance and capacitance.
The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. A tantalum or aluminum
electrolytic capacitor is best, since a film or ceramic
capacitor with its almost zero ESR can cause instability.
The aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the capacitance and ESR of
the capacitor will vary considerably. The capacitor
manufacturer’s data sheet usually provides this information.
The value for the output capacitor CQ shown in
Figure 13, Test Circuit, should work for most applications;
however, it is not necessarily the optimized solution.
Stability is guaranteed for CQ w 22 mF and an ESR v
5.0 W. The range of stability versus capacitance, load
current and capacitive ESR is illustrated in Figure 2.
Reset Output
The reset output is used as the power on indicator to the
microcontroller. This signal indicates when the output
voltage is suitable for reliable operation of the controller.
It pulls low when the output is not considered to be ready.
RO is pulled up to VQ by an external resistor, typically
5.0 kW in value. The input and output conditions that
control the Reset Output and the relative timing are
illustrated in Figure 14, Reset Timing.
Output voltage regulation must be maintained for the
delay time before the reset output signals a valid condition.
The delay for the reset output is defined as the amount of
time it takes the timing capacitor on the delay pin to charge
from a residual voltage of 0.0 V to the upper timing
threshold voltage VDU of 1.8 V. The charging current for
this is ID,C of 5.5 mA and D pin voltage in steady state is
typically 3.2 V. By using typical IC parameters with a 47 nF
capacitor on the D pin, the following time delay is derived:
tRD = CDVDU / ID,C
tRD = 47 nF (1.8 V) / 5.5 mA = 15.4 ms
Other time delays can be obtained by changing the
capacitor value.
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