NDS352AP 查看數據表（PDF） - Fairchild Semiconductor

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NDS352AP

P-Channel Logic Level Enhancement Mode Field Effect Transistor

Fairchild Semiconductor 

Electrical Characteristics (TA = 25°C unless otherwise noted)

Symbol Parameter

Conditions

Min Typ Max Units

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

IS

Maximum Continuous Source Current

ISM

Maximum Pulsed Drain-Source Diode Forward Current

VSD

Drain-Source Diode Forward Voltage

VGS = 0 V, IS = -0.42 (Note 2)

-0.42 A

-10

A

-0.8 -1.2

V

Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by

design while RθCA is determined by the user's board design.

PD(t) =

T J −TA

RθJA(t)

=

TJ −T A

RθJC+R θCA(t)

=

I

2

D

(t)

×

R DS(ON)@T J

Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.

b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.

1a

1b

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

NDS352AP Rev.D

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