NJU3426 查看數據表（PDF） - Japan Radio Corporation

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NJU3426

16-SEGMENT X 15-Digit VFD CONTROLLER / DRIVER

Japan Radio Corporation  

NJU3426

! FUNCTION DESCRIPTION

(1) ADDRESS COUNTER

The address counter indicates the “Display data RAM address”, in which the display data will be transferred and stored.

For the data transmission, once an initial RAM address is determined, the display data can be continuously transmitted

without setting the RAM address each time. When the upper 2 bits (B7 and B6) of the 1st word are “0,0”, the lower 5

bits (B4 to B0) are recognized as RAM address data. And, the 2nd word is recognized as display data, which will be

stored in the RAM address designated by the 1st word, and simultaneously the RAM address is counted up by an

auto-increment operation.

The “Display data RAM address”, which can be specified by the 1st word, ranges from “0,0,0,0,0” (00H) to “1,1,1,0,1”

(1DH). However, the auto-increment keeps counting up to “1,1,1,1,1” (1FH) every display data transmission because of

the 5-bit address counter, and finally the RAM address wraps to “0,0,0,0,0” (00H) and begins counting up. Note that the

display data, stored in the RAM address of “1,1,1,1,0” (1EH) and “1,1,1,1,1” (1FH), is ignored in this sequence.

DISPLAY DATA RAM ADDRESS

B7 B6 B5 B4 B3 B2 B1 B0

0 0 * AD4 AD3 AD2 AD1 AD0

Recognition data

Display data RAM address

*:don’t care

Character

address

B7

B6

B5 B4

B3 B2 B1

B0

RAM

Address

B7

B6

B5 B4 B3 B2

B1

B0

RAM

Address

C0

01H

00H

T0

C1

03H

02H

T1

C2

05H

04H

T2

C3

07H

06H

T3

C4

09H

08H

T4

C5

0BH

0AH

T5

C6

0DH

0CH

T6

C7

0FH

0EH

T7

C8

11H

10H

T8

C9

13H

12H

T9

C10

15H

14H

T10

C11

17H

16H

T11

C12

T12

C13

19H

1BH

18H

1AH

T13

C14

1DH

1CH

1FH

1EH

S15 S14 S13 S12 S11 S10 S9 S8

S7 S6 S5 S4 S3 S2 S1 S0

: These display data is ignored.

DISPLAY DATA RAM MAPPING

-2-

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